Codesys Ethernet/IP IO Mapping

Join Date
Dec 2015
Location
Windsor
Posts
27
Hi everyone,

I am using Codesys for the first time (V. 3.5 SP16 Patch 3) and I have used only Allen Bradley before this. I am struggling to understand how to map all tags easily into my struct variable. The data from the IO device comes in as SINT but I want to copy all that data into same sized struct that has all bits (Bools) but it is not arranged into different SINTs. In Rockwell you can take an array of bytes and copy it into a UDT of same sized bits easily, I am wondering if the same can be done with Codesys.

Please see pics for better explanation.

Thank you for your time!

io_from_device.PNG DUT_For_Inputs.PNG controllogix_io_from_device.PNG controllogix_UDT.PNG controllogix_copy.PNG
 
eds files that just present a load of SINTs are lazy IMO.
Create a UNION with the array of SINTs and the STRUCT you need as members, and declare a variable of this UNION.
Map the data to the SINT part and use the STRUCT part in the POU.
Pp
 
Hello paraffin_power. I have been struggling with same issue for some time but had not time to look into this, and had it in my ever increasing to-do list. Great the sameer.bhaskarla posted this issue. I would have not thought this solution myself. Will test this son. Thanks.
 
I think I got excited too early. Unfortunately this solution did not work completely for me, the first bit was fine but the second array is copying the values to second bit instead of the 9th bit as should be the case since its a sint. Can you please provide some more insight if I'm missing something.

Thanks
 
Hello. I am working in the development of an Ethernet/IP adapter that has 180 bytes of input for the EtherNet/IP scanner. I have not been able to crack a proper way to do a straight-forward mapping of the IO data into PLC program variables. Because my priority is the testing of the adapter device, rather than writing an elegant PLC program, I had to do something very primitive, which is to map each entry in the EDS file to a variable. I am working on user-defined data-type for the Codesys program to see if this can be done a little better. But it seems that for EtherNet/IP itis necessary to create one mapping per EDS entry.
I have deleted comments and field names because this is not a released product.

20201217_EIP_MAppingCosdesys.png
 
I think I got excited too early. Unfortunately this solution did not work completely for me, the first bit was fine but the second array is copying the values to second bit instead of the 9th bit as should be the case since its a sint. Can you please provide some more insight if I'm missing something.

Thanks


It would help if you could show a screen shot (e.g. press [PrtSc] key; paste into Paint; crop image; save as PNG; attach to a post here using
attach.gif
button in [Advanced Editor]).
 
AlfredoQuintero : That sounds so painful to have to map all the bits, I can't imagine how difficult it is going to be when using IO link master blocks with slave IO Blocks, the pain I will have to go through to map everything 🔨

drbitboy : Please see the picture to understand what I meant. As soon as I enter value of 1 in Array[1] it should have turned on the 9th bit

Capture.jpg
 
paraffin power : Thank you so much, coming from rockwell this was a misconception for me. Any byte or SINT would show up as 8 BOOLs in Rockwell software. Once I changed this to BIT it works flawlessly.

Attaching picture so it would confirm this for AlfredoQuintero as well. This should help you out as well.

Capture.jpg
 
Originally posted by sameer.bhaskarla:

Any byte or SINT would show up as 8 BOOLs in Rockwell software.

You probably already know, but just for clarity. This is only true when a BOOL is used in a data type, either user or system defined. In general data, a BOOL is a 32-bit quantity in the Logix family.

Keith
 
You probably already know, but just for clarity. This is only true when a BOOL is used in a data type, either user or system defined. In general data, a BOOL is a 32-bit quantity in the Logix family.
Keith


paraffin power and kamenges. I did not know this difference and as a result I had the very same struggles as sameer.bhaskarla. Thanks very much for these clarifications.
 
Hello again.

Although one should not use other people's posts for one's own questions, this one issue is so related that I give a try here, and is part of the discussion I did before.
My problem is related to mapping strucs to EtherNet/IP IO, as shown below. Will be grateful for your advice:

2020-12-18_Codesys_Mapping.jpg
 
I cracked it!!!!

I cracked it!!! Just declare the variables with the AT qualifier and indicate the IO address at declaration. I have spent so much time with this issue... It is only noon here and I already feel like downing a pint

2020-12-18_Codesys_Mapping1.png
 

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