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Digital Techniq ues

Preliminary Module 5
Elo Inst Systems
Notes 5.1 5. 1.1 - HO - 1

5 Digital Techniques

5.1 Electronic Instrument Systems

5.1. 1 Electronic Flight Instrument Systems

Introduction

As far as the pure basic functions and the number of display units are concerned , an
~Iectronic flig ht Instru ment system (EFIS) may be considered as being similar to
some type of flight director system. However, an EFIS is fully integrated with digita l
computer-based navigation syste ms.

It utilizes colour-CRT types of ADI and HSI (Figu re 1) . Therefore it is far more
sop histicated than a flight director.

This is not only in terms of physical construction, but also in the exte nt to whic h it
presents attitude and navigational data to the flight crew of an aircraft.

System Units

As in the case of conve ntional flight director systems, a complete EFIS (Figure 2)
installation is made up of left (pilot) and right (co-pilot) systems.

Each system in turn is comprised of


o two display units
- ~Iectro nic gttitude gev iation Indicator (EADI)
- ~Iectro nic horizontal ~ituatio n Indicator (EHSI)
o ~ mbol generator (SG)
o control panel
o remote light sensor unit.

A third (centre) SG is also incorporated in the system so that its drive signals may be
switched to either the left or the right display unit (in the event of failure of the
correspon ding SG).

The signal switching is accomp lished within the left and right SGs oyelectro- mech-
anical relays powered from the aircraft's DC power supp ly.

Display of Air Data

Refer to Figu re 3.

In a number of EFIS applications, the display of air data (like altitude, airspeed and
vertical speed) is still provided in the conventional manner, i.e. separate indicators
are mounted adjacent to the EFIS display units in the basic 'T' arrangement.

With the continued develop ment of display technology, however, CRTs with much
larger screen areas have been produced. As may be see n from the BOEING
747-400 flight deck layout in Figure 4, such displays make it unnecessary to provide
conve ntional primary air data instruments for each pilot.

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Digital Techniq ues
Preliminary Module 5
Elo Inst Systems
Notes 5.1 5. 1.1 - HO - 2

Figure 1 Electronic Flight Instruments


(Example)
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Q!. :-I + ~ to<


2. 2:; Left Attitude
::J ::::. Attitude
~. remote I-f-. deviation deviat ion
R<> light sensor indicator .
indicator

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c e' ;er{iRS TMC
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Data busses
DME FCC Left & VOR
DME C t { ILS
RAD.ALT TMC { VOR
DME Center{ IRS
FCC
ILS right ~R en er ~RJcs ILS
Left ~ALT RighI FMCS { Right ~ALT Left FMCS
Display unit ~ II
FCC FCC
{ IRS IRS drive signals
~
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FCC Right FMCS FCC
FMCS FMCS Switched ~ ~ m
drive signals _ co
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. :::J-
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zr
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Figure 2 EFIS Installation and Signal Interfacing 3 ~
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Digital Techniques
Preliminary Module 5 Elo Inst Syste ms
Notes 5.1 5.1 .1 - HO - 4

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Digital Techniques
Preliminary Module 5 Elo Inst Syste ms
Notes 5.1 5.1 .1 - HO - 5

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Page5
Digital Tec hniques
Preliminary Module 5
Num be rin g Systems
Notes 5.2 5.2 .1 - HO - 1

5.2 Numbering Systems

5.2.1 Number Systems

Mechanization and automation are increasingly used in production processes . Some


typical applicatio ns are

o monitoring the position of a machine tool or a missile by digital means


(locating function)

o packaging a certain number of items in a box (locating and counting function).

In many laboratory instruments such as

o frequency counters

o time rs

o digital voltmeters

the basic function of counting is carried out.

Electro nics , particularly with the advent of transistors and integrated circuits, has
revolutionized the techniq ues in all branches.

Howeve r, electronics in computer systems are only capable of distinguishing


betwee n

o current on and

o current off.

On the other hand, counters must be able to count up to several millions. In order to
solve such tas ks, different number syste ms instead of the decimal system have been
introduced in digita l and computer tec hniques .

5.2.1 .1 Decimal System

Since the dawn of civilization man has found it necessary to count, Le. to have a
method of representing quantities or measures of manipulating them to perform
functions of

o addition

o subtraction

o multiplication

o division .

Not unreasonably, it was found out that fingers provided an excellent physical aid for
registering any counting exercise to be done in somebody's head. From this the
decimal syste m was developed.

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Digital Techniques
Preliminary Module 5
N um be rin g Systems
Notes 5.2 5.2.1 - HO - 2

The deci mal system may be exp ressed fully in mathematical te rms by considering
the number 147, fo r exa mp le. Th is is the conventional shorthand way of exp ressi ng a
dec ima l number. The longhand way of writing th e same num ber is :

100 + 4 . 10 + 7 . 1

or 1Q2 + 4 . 10 1 + 7 . 10°·

The 10 is known as the base of the system and the indices indicate the power to
whic h the base is raised. The base and the particu lar index to which it is raised are
called the 'weight': that is , the least significant weig ht is 100 which is 1, the next is
10 1 and so on. The numbers by which each weight is multiplied are called 'digits' . In
practice , only the digits of the system are writte n, th e weights being implied.

Therefo re th e num ber 147 has the following mean ing :

14 7

~
7 . 10° =7 · 7
4 . 10 1 =4 ' 10 = 40
1 . 1Q2 = 1 . 100 100

147

or exp resse d otherwise:

147= 1Q2 + 4 ' 101 + 7 ' 1QO= 147 1O

147 = 100 + 4 . 10 + 7 . 1 = 14710.

The res ult is always 147 to the base of 10.

The number to the base of 10 consists of maximal 10 different figures : 0, 1, 2, 3, 4, 5,


6,7,8,9.

5.2.1.2 Other Number Systems

It is obvious that there are other number systems with different bases . So me
exa mples are:

2 . 82 + 2 . 8 1 + 6 . 8° = 226 8 226 to the base of 8


. 53 + 0 . 52 + 4 . 51 + 2 . 5° = 1042 5 1042 to the base of 5

1 . 2 3 + 1 . 22 + 0 . 2 1 + 1 . 2° = 11012 11 01 to the base of 2 .

Numbe r systems comprise only the amou nt of fig ures which are equal to the base:

D base 5: figures 0, 1, 2, 3, 4

D base 2: figures 0, 1

D base 16: figures 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F.

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Digital Tec hniques
Preliminary Module 5
Num be rin g Systems
Notes 5.2 5.2.1 - HO - 3

The Binary Number System

As mentioned before, a computer system can only distinguish betwee n

o current on and

o current off.

This is the same as high (H) and low (L) or '1' and '0'. T herefore number systems
with the base of 2 are ideal for use in computer systems.

It is obvious from the example that the digits of the syste m using a base of 2 are
either '1' or '0', and this is true for any number expressed to the base of 2.

Figure 1 shows numbers expressed to the base of 2 together with their decimal
equivalent numbers .

Numbers expressed to the base of 2 are useful for electron ic counting systems
because electro nic circuits which can be set to one of two states are made very
simple, whereas circuits with more than two states , although possible , are much
more complex and less reliable.

The counting system using a base of two is called the 'binary syste m' and each '1' or '0'
is called a 'bit', whic h sta nds for :..binary digit. The number of bits in the binary form of
the decimal number 147 is eight and the highest decima l number which can be obtained
with eight bits is 255.

The binary code discussed so far is not the only code which is expressed in
two -state bits. All counting codes with two-state bits, however, fall into one of two
classes , weighted and unweighted. A weighted code is one in which a '1' bit is
allotted different va lues depend ing on its position in the number.

Example: The code shown in Figure 2 is weig hted; a '1' in the 2° position of the
column weight has the value 1, a '1' in the 2 1 position has the value 2, a '1' in
the 22 position has the value 4 and so on. The order of bits in unweighted codes
changes in such a way as to make this sort of weight ing meaningless .

A system in which binary-type elements are connected toget her to count to the base of
10 is called a 'Qinary Qoded gec imal (BCD) syste m'. BCD is of major importance since
it provides the link between the counting syste m used by the machine and that used by
man.

The table shown in Figure 2 gives an overv iew of the different number systems. This
is a weighted code.

Examp les: o The binary number 1010 has a decimal va lue of


1 . 23 + 0 . 22 + 1 . 2 1 + 0 . 2° = 10

o The binary number 0011 has a decimal value of


o . 2 3 + 0 . 2 2 + 1 . 2 1 + 1 . 20 = 3.

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Digital Tec hniques
Preliminary Module 5
Num be rin g Systems
Notes 5.2 5.2.1 - HO - 4

The Octal Number System

With three bits of a binary number a maximum of 8 decimal values can be represented.
A number system to the base of 8 is designated an 'octal syste m'. The octal system
uses 8 numbers or figures, which are 0, 1, 2, 3, 4, 5, 6 and 7.

The octal number 3174 has the following meaning:

31748 = 3 . 83 + 1 . 82 + 7 . 8 1 + 4 . 80 .

Each digit of the octal number can be represented by 3 bits of a binary number.

Example: 3 1 7 4 (octal)
011 001 111 100 (binary).

The Hexadecimal Number System

With four bits of a binajy number a maximum of 16 decimal values can be represented.
A number system to the base of 16 is called a 'hexadecimal system '.

As mentioned before, a hexadecimal system has 16 different numbers or figures.


There are only 10 numbers in the normal decimal system and therefore it has been
agreed that the letters A to F are used in hexadecimal systems.

Refer to Figure 3.

In computer technique it is common that a single character contains 8 bits which are
called one 'word'. To represent one character, e.g. 'Z', 8 lines within a computer are
necessary to transmit this character, from the keyboard to the monitor for instance.

During transmission of the character the current at the 8 lines is on or off, e.g.:
line 1 - no current = 0
line 2 - current =
line 3 - no current 0
line 4 - current =
line 5 - current =
line 6 - no current = 0
line 7 - current =
line 8 - no current 0

This bit combination represents the letter 'Z'. In order to simplify this combinat ion it is
divided into two 4-bit groups: 0101 and 1010. The hexadecimal number for 0101 is
'5' and for 1010 is 'A', so the combination 0101 1010 can simply be expressed as
5A(H), whereby the letter H is the abbreviation of hexadecimal.

This method is an easy way to minimize a row of binary digits (bits) to a short row of
hexadeci mal numbers, eg.:
Decimal: 100,000
Binary: 0001 1000 0110 1010 0000
Hexadeci mal: 8 6 A O.

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Digita l Techniques
Preliminary Module 5
Numbering Systems
Notes 5.2 5.2.1 - HO - 5

5.2. 1.3 Mathemat ical Conve rsion of Number Systems


This chapter deals with the conversion of numbers from one type of number syste m
into another.

Conversion of Decimal Numbers into Binary and Hexadec imal Numbers

Refer to Figure 2 again.


The task is to conve rt the decimal number 33410 into a binary number. For this
purpose the decimal number is divided by the base 2 as often as the solution is O.
The solution of each division is an intege r with a remainder in the range of 0 to 1.
The remainder of the first divisio n is the lowest digit, called 'least signif icant bit
(LSB)' , of the solution of the conve rsion while the remainder of the last division is the
highest digit, called 'most sign ificant bit (MSB)':
334 : 2 = 167 remainder 0 (LSB)
167 : 2 = 83 remainder 1
83 : 2 = 41 remainder 1
41 : 2 = 20 remainder 1
20 : 2 = 10 remainder 0
10 : 2 = 5 remainder 0
5 :2 = 2 remainder 1
2 :2= 1 remainder 0
1 :2= 0 remainder 1 (MSB).
The solution is (1 0100 1110)2.
In the same way a decima l number can be conve rted into a hexadec imal number.
For this purpose the decimal number is divided by the base 16 as often as the
solution is O. The solution of each division is an integer with a remainder in the range
of 0 to 15. The remainder is a decimal number and must be converted into a
hexadec imal expression as shown in Figure 2.
The remainder of the first division is the LSB of the solution of the convers ion while
the remainder of the last division is the MSB:
334 -7- 16 = 20 remainder 14 (LSB)
20 -7- 16 = 1 remainder 4
1 -7- 16 = 0 remainder 1 (MSB).
The decimal remainder 14 equals the hexadecimal number E as shown in Figure 2,
therefore the solution is 14E 16 .

Conversio n of Binary Numbers into Decimal Numbers

Refer to Figure 1 again .


To convert an eight bit binary number into a decima l number for example 101010112
the position va lues of eight positions have to be determi ned, namely:
2 7 2 6 2 5 2 4 2 3 22 2 1 2 0
10 10 101 1

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Preliminary Module 5
Nu mbering Syste ms
Notes 5.2 5.2.1 - HO - 6

In every location where there is a 1 bit, the numbers should be added together.

1 • 27 + 0 • 26 + 1 • 2 5 + 0 • 24 + 1 • 23 + 0 • 22 + 1 .2 1
+ 1 • 2° = 17110
The decimal equivalent of 101010112 is 17110.

Conversion of Hexadecimal Numbers into Decima l Numbers

Refer to Figure 2 again.

To convert a five digit hexadecimal number into a decimal number for example
FB8A7 16 the position values of five positions have to be determined, namely:

164 163 162 16 1 16°


F B 8 A 7

According to Figure 2 the hexadecimal values shou ld be multiplied with the corre-
spondi ng position values and added together.

15 • 164 + 11 • ~ 63 + 8 • 162 + 10 • 16 1 + 7 • 16°


= ~030311 1O

The decimal equivalent of FB8A716 is 103031110.

Conversion of Decimal Numbers into Octal Numbers

To convert a decimal number into an octal number for example 298 10 proceed as
follows:
1. Start with the highest power of 8 (octal) that is smaller than the number.
2. Divide the decimal number by that power, keeping only the integer part of the re-
sult.
3. Keep the remainder after the division is done, for the next step.
4. Repeat steps 1. to 3. until all octal digit places are filled, and then put there what-
ever is left after the higher digits were done.

Decimal value before con-


sidering this digit place
298 298 Ij42
II
" 2

Power of 8 83 82 81 8°
Value of digit place 512 64 8 1
Value of digit place
smaller than current deci- No Yes No -
mal number?
298/64 = 4.656 42/8= 5.25
Division step skip 4 will be used 5 will be used 2/ 1= 2
for this digit for this digit
Remainder after division skip 42 2 - •
Octa l digits 0 4 5 2

The octal equivalent of 298 10 is 4528.

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Digital Tec hniques
Preliminary Module 5
Num be rin g Systems
Notes 5.2 5.2.1 - HO - 7

Conversio n of Octal Numbers into Decima l Numbers

To convert from an octal number to a decimal number for example 4528 conduct as
follows:
1. Take the va lue of each octa l digit, convert it to decimal.
2. Multiply it by the power of 8 represented by the digit's place in the number.
3. Then all the numbers shou ld be added together.
Read the table from left to right, top to bottom; each digit's va lue is multiplied by the
appropriate power of 8 and added together, yielding the result 29810.

Octal number 4 5 2

.
Decimal value of digit 4 5 2
PC2wer of 8) .' 82 81 8°
Value of ~d ig it place 64 8 1
Value for this number 64- 4= 256 5-8 = 40 2- 1= 2
Running sum (from left to
256 256+40 = 296 296+2 = 298
right)
.•, 10.

Conversion of Hexadecimal Numbers into Binary Numbers and Vice Versa

Refer to Figure 2 again.


The task is to convert the hexadeci mal number 3F416 into a binary number. The
conversion is made digit by digit.
As shown in Figure 2 the hexadecimal number
3 equals 0011
F equals 1111 and
4 equals 0100 .
The complete binary conversio n therefore is:
0011 1111 01002
or
11 1111 01002,
The task is to conve rt the binary number 0010 1011 11 002 into a hexadecimal number.
Because a hexadecimal digit can include 4 binary digits the binary number is divided
into blocks of 4 digits and conve rted block by block.
As shown in Figure 2 the binary digits
0010 equals 216
1011 equals B 16
1100 equals C 16.
The solution therefore is 2BC 16.

Conversio n of Binary Numbers into Octal Numbers

A binary number can be represented in octal form by groupi ng its bits into sets of
three bits. Each group of three binary numbers represe nts one octa l number.

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Digital Tec hniques
Preliminary Module 5
Num be rin g Systems
Notes 5.2 5.2.1 - HO - 8

The base-8 numbers have the advantage of being far shorter than binary numbers,
and hence much easier to work with.

The reason the binary number is broken up into groups of three is because the
largest octal number that can be represented is 7 (the base 8 minus 1). It only takes
3 binary digits to represent the largest octal number 7.

111 2 = 1 - 22 + 1 - 2 1 + 1 - 2° = (4 + 2 + 1) = 78

To convert a 8 bit binary number for example 010101002 the number have to be
broken into groups of three binary digits, starting with the rightmost bit, namely:

Group 1: 100

Group 2: 010

Group 3: 01 or 001

Note: To add an extra a to the leftmost side will not change the value of
the number.
1. Each group of three aigits has to be converted separately.
2. The binary position values have to be determined.
3. In every location where there is a 1 bit, the numbers should be added together.

Group 1: 1002 = 1 - 22 + 0 - 2 1 + 0 - 2° = (4 + 0 + 0) = 48

Group 2: 0102 = 0 - 22 + 1 - 2 1 + 0 - 2° = (0 + 2 + 0) = 28

Group 3: 0012 = 0-22+0-2 1+1-2° = (0+0+ 1) = 18

The octal equivalent of 010101002 is 4218.

Conversio n of Octa l Numbers into Binary Numbers

To convert from a binary number to an octal number for example 452 8 the three digit
binary equivalent has to be listed for each octal figure.

48 = 1 - 22 + 0 - 2 1 + 0 - 2° = 1002

58 = 1 - 22 + 0 - 2 1 + 1 - 2° = 1012

28 = 0 - 22 + 1 - 2 1 + 0 - 2° = 0102

The binary equivalent of 4528 is 1001010102.

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Digital Techniques
Preliminary Module 5
Numbe ring Systems
Notes 5.2 5.2 .1 - HO - 9

20 1 28 256

21 2 29 512

22 - 4 2 10 - 1,024

23 - 8 2 11 2 ,048

24 16 2 12 4,096

25 32 2 13 = 8,192

26 - 64 2 14 = 16,384

27 = 128 2 15 =32,768 ~
~
ell

Figure 1 Numbers to the Base of 2

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Digita l Techniques
Preliminary Module 5
Numbering Systems
Notes 5.2 5.2.1 - HO - 10

Dec ima l Hexadecima l Weights

23 22 21 2°
or or or or
8 4 2 1
I

0 0 0 0 0 0
.
1 I 1 0 0 0 1

2 2 0 0 1 0
.
3 3 0 0 1 1
I

4 1'- 4 0 1 0 0
-
5 5 I' 0 1 0 1
I
...
6 6 0 1 1 0
I.
~
7 7 0 1 1 1

8 8 1 0 0 0
,
\1 •
9 9 1 0 0 1
(

10 A 1 0 1 0

11 B 1 0 ~ 1
II I

12 C 1 1 0 0

13 D 1 1 0 1
II

14 E 1 1 1 0 .
1
15 F 1 1 1 1

Figure 2 Table of the BCD Conversion System

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Digital Techniques
Preliminary Module 5
Numbering Systems
Notes 5.2 5.2 .1 - HO - 11

Mon itor

Line: 8 7 6 5 4 3 2 1

Current: 0 1 o 1 1 o 1 o o = no current
1 = curren t

Key

Keyboard

Figure 3 Representation of the Letter Z

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Digital Techniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3 .1 - HO - 1

5.3 Data Conversion

5.3.1 D/A and AID Converters

5.3. 1.1 D/A Converters

Introduction

Analogue electronic systems operate on information using an electrical paramete r,


suc h as voltage or current, that is proport ionally related to the measured quantity.

Digital electronic systems operate on information using a numerically coded


represe ntation of a measured quantity.

Special electronic circuits are employed to link analog ue and digital electronic
circuits. These circuits are designated
o £!nalogue-to -gigital Qonverter (AID converter or ADC) circuits
o .d.igital-to-gnalog ue J,lonverter (D/A conve rter or DAC) circuits.

Comparison of Analogue and Digital Signal Processing

A transducer is a device that serves to translate one type of signal into another type
of signal.

In the field of electronics, a transducer is a device that converts electrica l and non-elec-
trical signals , as, for instance, a microphone. The majority of signals produced by
transducers are analogue in nature, that is, the voltage va lue of the input or output
signal is exactly proportio nal to the non- electrical signal that the transduce r produces or
measures.

The nature of analogue signals (Figure 1, detail a)), such as sound, cannot be
changed, but the way in which the signals are processed can be changed.

In a digital signal processing system (detail b)) the processor block operates only on
binary coded numbers:
o ADCs translate analogue signals over a specified range into binary coded
numbers.
o DACs produce an analogue voltage or current output from a binary coded
number input.

Digital Coding of Ana logue Signals

The analog ue signal can be thought of as a continuous, smoothly varying value of


voltage or current that changes with respect to time. The analogue signal is
continuous in amplitude and time (Figure 2, detail a)).

In order to tra nslate the analog ue signal into a digital (numeric) one, the resolution on
the time and amplitude axes must be limited.

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Digital Tec hniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 2

The amplitude and time axes are subdivided into a number of equally spaced
intervals , and thereby, the resolution of measu rement is limited to the width of one of
these intervals (detail b)).
Subdividi ng an axis in this manner quantizes the va riable on that axis. Then only one
of a fixed number of va lues (detail c)) can be assu med by the va riable.

Sampling and Quantization

Sampling refers to subd ividinq the time axis into a finite number of intervals.
The analog ue sig nal can be thought of as being periodically samp led to obtain a new
sig nal va lue.
Figure 3, detai l a) shows a sampling examp le of a sine wave . In deta il b) a squa re
wave is illustrated.
Quantizatio n means that the maximu m output range of an analog ue signal is divided
into a fixed number of small , equal intervals designated '1 LSB output level change ',
i.e. an output level change by 1 LSB. Each interval is then associated with a fixed
binary numbe r.
In order to quantize the time axis of meas urement it is only necessary to generate
pulses periodically. Each pulse is a comma nd to measu re the amplitude and to sto re
the result.
The digital hardware required to produce the required pulse train is extremely simp le,
amounting to only a multivibrator circuit and a counter to divide the oscillator
frequency to an appropriate value, name ly the samp ling rate.

Digital-to-Analogue Converte r Circuits

The basic purpose of a Qigital -to -gnalogue Qonverter (DAC) is to translate a binary
numbe r into the correspond ing analogue voltage va lue.

Review of OP Circuits

Operational amplifier (abbreviated 'OP') circuits are frequently applied to D/A


conve rter circuits. In D/A converters, the primary purpose of OPs is that of current
summat ion (adders). In this capac ity, the OP is used with a resistive networ k to add
currents that each represent the weight of a binary digit.
The inverting amplifier is the basic OP circuit that is used fo r current summatio n as
shown in Figure 4, detai l a).
0
An inverting amplifier provides a shift of 180 between input and output signal. In
other words, the pola rity of the output signal is opposite to the polarity of the input
sig nal.
The voltage gain of the inverti ng amp lifier is determined by the ratio of the resistors
R1 and R2 according to the following form ula:

A = Uo = _ ill.
U U1 R2

Note: The minus sign indicates that the input signal is inverted , that means , if the input
voltage UI is negative , the output will be posit ive or vice versa.

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Digital Tec hniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 3

If there is more than one input current as shown in detail b). the sum of the currents
flowing to the inverting terminal of an OP circuit used as adder circuit equals the
feedback current If = 15 acco rding to Kirchhoff's law:

o = 11 + 12 + 13 + 14 + 15 /- 15

- 15 = 11 + 12 + 13 + 14 / 1n = Un
Rn

Uo U1 U2 U3 U4
- R5 = R1 + R2 + R3 + R4 t R5

R5 R5 R5 R5
- Uo = U, . R1 + U2 • R2 + U3 • R3 + U4 • R4

The last equation shows that the output voltage is the weighted sum of the input
voltages .

The weighti ng factor is determ ined for each input by the ratio of the feedback resistor
R5 to the input resistor (R1, R2, R3 or R4) in that branch. Any number of inputs is
possible by simply connecting additional input resistors.

Simple DAC Circuits

The importance of the sca ling adder circuit is realized when it is cons idered how binary
numbers are conve rted into decimal numbers.
A four-digit binary number can be translated into the equivalent decimal va lue 8:

1000 bin = 1 . 2 3 +0 . 2 2 :f 0 . 2 1 +0 . 2° = 8

There is a similarity betwee n this equation and the scaling adder function in the equatio n
mentioned before.
Refer to Figure 5.

When the resistor ratios of the 4 inputs are matched to the power of 2,

R5 R5 R5 R5
R4 = 8, R3 = 4, R2 =2 and R1 = 1,
and the input voltages U1 to U2 are referred to UREF, the followi ng for mula is
achieved :

U REF • 8 + U REF • 4 + UREF • 2 + U REF • 1 = - Uo

When the switches in the 4-bit DAC shown in Figure 5 are set to correspond to the
digits of the binary number, a voltage Uo is produced that is exactly proportional to
the binary input.
In order to make all output voltages positive, the reference vo ltage should have a
negative value.

Example: The switches are set for binary '1000'. The reference voltage equals - 1 V to
provide a positive output vo ltage Uo acco rding to the last formula. The output
voltage produce d will be
U, ( - 1 V) . 8 + 0V .4 + 0V .2 +0V . 1 = - 8V

U, ( - 1 V) . 2 3 +0V . 22 +0V . 21 +0V . 2° = - 8V

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Digital Tec hniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 4

The term av
(= U REF) instead of - 1 V (= UREF) is set, because these inputs are
switched to ground. Th e input at R1 is the least §.ignifica nt .!2it (LSB), and the
input at R4 is the most §.ignificant .!2it (MSB). The output voltage will be +8 V,
because of the 180 0 phase shift of the amplifier (-8 V is the value of - Uo , Uo =
+8 V) .

In most DACs the switc hes are implemented with ~omp le me ntary metal Qxide §.i1icon
(CMOS) field ~ffect transistors (FET), so that the circuit is fully electronic.

Such a simple DAC as described before can also be used as an amplifier with
digitally controlled gain. If the fixed reference voltage is replaced by a signal source,
then the output will be an amplified ve rsion of the source, whose gain is determined
by the switc h sett ing.

The construction of a DAC as shown in Figure 5 is not complex, yet it has some
serious limitations. The most important factor to be considered is the exponential
series of the resistor va lues in the network. A resista nce error of 10 % in the least
significant bit would cause a 10 % error in the basic increment of the analogue
output.

As an example a four- bit DAC with - 1 V reference should be considered . The basic
increment of the analogue output is 1 V, and its range is from a to 15 V. A 10 %
tolera nce in the LSB resisto r means that the output error contributed by the LSB
branch would be about +0.1 V, which is 10 % of the basic 1 V interval.

An error of 10 % in the MSB resistor , howeve r, would cause an error of about +0.8 V,
which is 80 % of one basic interval in the output. Conseq uently, the resistor va lues
must be extremely accurate to ensure linear operation of the DAC .

Another problem is the effect of a very wide range of input resistor values on the
operational amplifier 's operation . The largest input resistor cannot be made so large
that it approaches the value of the input impedance of the OP (within a factor of ten) .

If it does , earlier assumptions in the analysis about no current flowing into the '- ' input
of the OP are invalid . On the other hand, the smallest resistor cannot be made so small
that it approaches the value of the OP output impedance (again, within a factor of ten).

A typica l OP with an input impedance of 5 MQ and an output impedance of 150 Q


limits the input resistor range to between 500 kQ and 2 k , providing a conve rsion of
about eight bits.

R -2R Ladder Networks

In order to overcome the problems and limitations of exponentia l resistors in a DAC,


as desc ribed before, spec ial circuits or networks must be used.

A spec ial resistive network is the R-2R ladder netwo rk, as shown in Figure 6. The
circuit derives its name from the fact that only two different va lues of resistance are
used, one being twice the va lue of the other. The feedback resistor in the OP circuit is
selected to obtain the desired gain. Since only two resistor val ues are needed, it is
considerably easier to match their tolerances. When the resisto rs are integrated on a
single chip of silicon, their relative values will almost always be identical, even though
their absol ute resistances may vary.

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Digital Tec hniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 5

Since the resistor ratios are the most important facto rs in the R-2R ladder, absol ute
accuracy is not critically important. For this reason, if the resistors change in equal
proportion with temperature, no errors will be seen on the O/A output, since the ratios
remain identical.

The four-input ladder networ k is redrawn in Figure 7 to illustrate how a current


induced at one end of the network is success ively divided by two in each stage . If a
current originates at an input closer to the end, it will have been divided less when it
reaches the end, and consequen tly will have more weight.

Using the idea of superpos ition, and assuming that the sou rce voltage is identical for the
diqits 'B3' to 'BO', it can be see n that the current flowing through the te rminal branch of
the ladder network is the weighted sum of the binary input digits. An operat ional
amplifier is only added to amplify the current flow in the terminal branch to a useful level.

Refer to Figure 6 again.

Because the resistance of the network as viewed from the OP's '-' input is always the
same , regardless of how many stages are present in the ladder network , a va lue of 'R'
can be selected so that the input and output impedances of the OP will never approach.
Thus, loading the OP will never be a problem.

Finally, the effect of transistor switches is perfectly balanced , since the resista nce, that
each transistor faces, is identical no matter which branch it controls.

5.3.1.2 AID Converters

Introductio n

The basic idea of an g nalogue-to-gigital ~onve rte r (AOC) is to translate a value of


voltage or current into a correspo nding binary number. The AOC can be designed in
many different ways .

Two basic methods are used for realizing NO conversio n:


o methods without feedback (open- loop methods)
o methods with feedback (closed -loop methods).

Amplitude Quantization

Refer to Figure 8.

Amplitude quantizatio n means that the maximum input range of an analog ue signal is
divided into a fixed number of small, equal intervals designated '1 LSB output level
change', i.e. an output level change by 1 LSB.

Each interval is associated with a fixed binary number. Prerequisite for an AOC to
perform such a function are two factors whic h must be specified :
o the maximu m range of analog ue input vo ltage
o the output resolution, determ ined by the number n of output bits.

The more binary digits (bits) of outputs are available, the better the resolution and the
more precisely can the analog ue signal be encoded.

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Digital Techniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 6

Resolution

Resolution is the sma llest change in analogue input that can be distinguished by an
AID conve rter.
The resolution of an ADC cannot be absolutely high: In most cases , a digita l output
betwee n 8 and 16 bits provides adequate resolution.

ORen- Loop AID Conversion Methods

The Flash Converter

AID conve rsion by means of a flas h conve rter is the simplest conversion method
possible as it uses the fastest and most expensive tec hnique.
Refer to Figure 9.
The circuit is based on the differential compa rator. Although the circuit looks like an OP
circuit, its output is either logic '0' or logic '1', depending on which of its inputs has the
higher voltage .
A sma ll amount of hysteresis is built into the comparator to solve any problems that
might occur if both inputs were of equal voltage .
Refer to Figure 10.
The primary featu re noted in the flas h converte r circuit is the resistive divide r netwo rk.
At each node of the divider, a reference voltage is available. Since all resistors are of
equal value, the vo ltage levels available at the nodes are equally divided betwee n the
reference vo ltage and ground.
The aim of the circuit is to compare the analog ue input voltage with each of the node
voltages.
Refer to Figure 11.
The output of the circuit is illustrated for a typica l input vo ltage. Pure combinational
logic follows to produce a binary encoded output.
For additional digits of precision in a flash conve rter, much more circuitry is needed.
In fact , the number of circuit components at least doubles with each added digit of
precision.
Thus, only when extremely high speed or high precision !NO conversion is needed a
flash converter should be used. Typical convers ion time for such circuits is 100 ns or
less.
As descri bed before , a flash converte r needs one comparator for each value of the
conve rter, for example an 8- bit flash converter needs 2 8 (= 256) comparators.
The 'subranging flash converter ' and the 'piped flash converter' are only two
examples of seve ral possibi lities to minimize the amount of compa rators.

The Time-Window Converter

Refer to Figure 12.


A simple and inexpensive circuit with very wide range can easily be const ructed
when high speed is not necessary. This circuit is called the time- window converter
and is based on the monostable multivibrator (one-shot).

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Digital Tec hniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 7

In this type of AOC, the analog ue input signal controls the pulse width of a monost-
able multivibrator, whose output is used for gating the clock input of a counter.
The count value present in the counter at the end of the monostable's pulse width is
proportional to the analogue input.
This approach is particularly useful when the analog ue input is controlled by a
potentiometer; there is a direct control over the monostable 's pulse width by varyi ng
the resistance (shaft angle) of the potentiometer. If the analog ue input is electrical in
nature, the potentiometer can be replaced by a controlled -resista nce device, such as
an FET transistor.
With a fairly high speed system clock frequency of 20 MHz, a 1O-bit NO converte r
designed for using the time-window technique provides a sample period of about
55 lIS (approximately 18 kHz) , which is too slow for any analog ue signals with
frequency componen ts greater than 1.8 kHz. If speed is not important the time-win-
dow converter will be the most efficient design.

The Ramp Converte r

Refer to Figure 13.


One useful approac h to N rlJ conve rsion involves the comparison of the analogue
input with a consta ntly changing (sweepi ng) voltage. The reference voltage is
generated by the ramp generato r and is fed as a ramp output voltage to the
comparator. When the ramp output voltage is zero the 8-bit natural binary counter
starts counting the syste m clock pulses. When the ramp output vo ltage value equals
the analog ue input value the counter stops counting and thus the counted syste m
clock pulses are a measure of the analog ue input.
The time- window converte r and the ramp conve rter conve rts a voltage level into a
measure of time, which can be counted with a binary counter. However, the circuits
are subjected to error because of variations in the timing components with tempera-
ture, and due to aging.

Note: The 'timing components ' referred to are the resistor and capacitor components.

Advance d tec hniques using the ramp approac h utilizes two ramps:
o one to measure a fixed , accurate refere nce vo ltage
o one to measure the signal source.
For measuring the reference voltage and compari ng it with the signal sou rce,
the timing com ponents of the ramp generator are calibrated against the accurate
voltage reference on every conve rsion .
Thus, va riations in the timing com ponents over time are compensated for.
This technique is known as 'dual-slope NO conve rsion'.

Closed - Loop AID Conve rsion Methods

Closed-loop NO methods can be distingu ished from open-loop methods by the


presence of negative feedback. In closed -loop circuits , part of the output is fed back
to the input of the circuit and compared with the present input value. The result of this
comparis on causes corrective action to be taken, so that the output value matches
the input va lue more closely.

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Digital Tec hniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 8

This is the basic idea behind the OP circuits. If the input of a circuit is analog ue and
its output is digital, then a prerequis ite for the presence of feedback will be a
digital-to-analogue converte r necessary to carry out the comparison betwee n the
two analogue signals . Thus, in closed-loop AID converter circuits, one of the
components must be a D/A converter.

The Successive Approximation Tracking NO Converter

Refer to Figure 14.


The successive approx imation tracking ADC is the simplest closed -loop ADC.
It comprises th ree basic componen ts:
[::J a binary up/down counter circuit
o a DAC circuit
B a comparator circuit.

The D flip flop forms part of the counter circuit because it ensures that the up/down
signal does not change at the same time as the counter 's clock input.
The binary counte r produces a digital output that is the primary output of the circuit
and which also drives a DAC. The analog ue output of the DAC is compared with the
circuit's analog ue input:
o If the input is greate r than the feed back signal , the counter will be forced to
count up.
o As soon as the fee dback signal becomes greater than the input, the counter
reverses direction and counts down.
Refer to Figure 15.
As long as the analogue input changes slowly, the tracking ADC is of the correct
value within one LSB. When the analog ue input changes rapidly, the tracking ADC
cannot keep up with the change , and an error occu rs.
The tracking ADC has the advantage of being very simp le in desig n and easy to
const ruct. Unfortunately the time needed for its stabilization at a new conve rsion value
is directly proportional to the rate at whic h the analogue signal changes :
o For slowly varying signals (small maximum slopes) , there is no problem.
o For more typical signals that can change quickly at times , the tracking ADC is
inadequate.
To minimize errors , the comparator at the input is built as samp le and hold circuit.
It holds the value of the input voltage constant until the tracking ADC has completed
the conversion of the respective va lue.

The Successive Approximation Register NO Converter

Refer to Figure 16.


The successive approximation register converter is a compromise between the best and
the worse feature of the successive approximation tracking converter.
The successive approximation tracki ng converter can make only one incremental step
per clock pulse. The 8-bit tracking converter may need between 1 (minimum) and 255
(maximum) clock pulses in order to reach a new conve rsion value.

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Digital Tec hniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 9

With this characteristic the conversion time is directly proportional to the rate of
change of the analogue input signal , and when any part of the analog ue signal is
changing by more than one incremental step per clock pulse, a substantial error is
introduced.

For a success ive 'n'- bit approxi mation registe r ND converter, exactly 'n + l ' clock
pulses are required for a full conve rsion cycle, no matter what the analog ue input
may be. An a- bit conve rter of this type, for example, does always require nine clock
pulses to obtain a valid digita l output.

Just like the tracking ADC , the successive approximation register ADC uses an
integrated DAC as a feedback loop, whose analogue output is compared with the
input signal.

Refer to Figure 17.

The conversion cycle of a successive a-bit approx imation register device involves
the following sequence:

Bit 7 (MSB) :
1. Set the MSB to '1' and all other bits to 'a'.
2. Compare the analog ue input to the D/A output.
o When the analogue input is greater than the D/A feedback value, then
'10000000' is less than the correct digital representation. Leave the MSB at '1'
and go on to the next lower significant bit.
o When the analogue input is less than the D/A feedback value , then '10000000'
is greater than the correct digital representation. Reset the MSB to '0' and go
on to the next lower significant bit.

Bit 6 :
3. Set bit 6 to '1', leaving all other bits unchanged.
4. Compare the analog ue input to the D/A output.
o When the analogue input is greater than the D/A feedback value, then
'X10000000' is less than the correct digital represe ntation. Leave bit 6 at '1' and
go on to the next lower significant bit.
o When the analogue input is less than the D/A feedback value , then 'X10000000'
is greater than the correct digital representation. Reset bit 6 to '0' and go on to
the next lower significant bit.

Bit 5 :
5. Set bit 5 to '1', leaving all other bits unchanged.
6. Compare the analog ue input to the D/A output.
o When the analogue input is greater than the D/A feedback value,
then 'XX10000000' is less than the correct digital representation. Leave bit 5 at
'1' and go on to the next lower significant bit.
o When the analogue input is less than the D/A feedback value, then 'XX10000000'
is greater than the correct digital representation. Reset bit 5 to '0' and go on to the
next lower significant bit.

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Digital Techniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 10

Bit 4 to 0:
7. For bit 4 to bit 0 (LSB) the sequence is continued in the same manner as de-
scr ibed for bit 7 to bit 5.

Figure 18 shows the graph of the conversion sequence as descri bed before.
The conversion is completed after the ninth clock sequence. The output register is
loaded with the result and a new conversion period is initialized.

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For Training Purposes Only Page27


Digital Techniques
Preliminary Module 5
Data Co nve rsion
Notes 5.3 5.3.1 - HO - 12

a) Original analogue signal

11
10
9
Q) 8
'0
~> 7
a.E 6
«E- 5
4
3
2
1
o 10 30 50 70 90 110 130 150 170 190 Time (us)

b) Analogue signal quantized in time and amplitude

11
10
9 - - - - .... • •
'0
Q) 8 ---., I
I
• • •
~> 7 I
I • • • •
a.E 6
E-
- .... I
I • • • •
I
« 5 I
I I
I • •
4 I
I I I
3 ~
I I I I
2 I I
I I
1 I
0

c) Sequence of numbers representing the original analogue signal


, r
~ ...
Time 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190

Quantized
0 3 6 8 9 9 9 7 6 5 5 6 6 7 8 8 8 7 7 6
amplitude
~

Figure 2 Quantization in Time and Amplitude

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Digita l Techniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 13

a) Sine wave sampled eight times per cycle

Amplitude

b) Square wave sampled eight times per cy.cle

Amplitude
Original square wave
Square wave reproduced from the samples

Figure 3 Sampling

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Digita l Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 14

a) Inverting amplifier

R2

Uo

b) Scaling adder with 4 inputs

IR1 R1
U1
IR2 R2
U2
IR3 R3 R5
U3
IR4 R4
U4

u, 1
Uo

Figure 4 Applications of Op Amp Circuits

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Digita l Techniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 15

Switch settings: Logic '1' is UP


Logic '0' is DOWN

RS
Reference
voltage

'1' BO (LSB) R1

'0'

'1' R2

'0'

'1' R3

'0' Uo

'1' R4
-U REF
'0'

Switches are set R1 = RS


for '1000' R2 = RS/2
R3 = RS/4
R4 = RS/8

RS = 8
R4

Figure 5 Principle of a Simple 4-Bit DAC


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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5 .3 5.3.1 - HO - 16

..........
o
o o e8L l If
C\I
::J
a
CIl
+
C\I

T"""

CO
+
N
C\I
o
C\I
CIl
«
c
a: +
C\I
C') JII::
C\I I-
o
~
Z
a:-Ia:
co
a: '<:t I-
CI)
a: LL
"C
C\I W "C
::J
IT:
m
..J
I
II
a:
a: C\I
o I
a:
::J
a:
C\I
......
-
mI
~
I-
a: I-I
tt<.9
a: -la:
C\I .~ .~

:- 9
o o
'5>'5>
o 0
-l -l

en
OJ
a: c
C\I .....
1D
en
.r:::
o
.....
.~
en
LL
W
IT:
::J
I

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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 17

as
c
'E'-0....
!I
C\J ~O 86LLlV
I "I-
0
(1)
«
...co
C')
E «
LO E CJ)
C\J LO !I
C\J C\J
C')co J:
..--.
C') coC/) e
---- ~ co
W
e
.-
t/)
~
!I co
C.
«
E
«
E !I
-co
::::J
LO C\J
..--.
LO
C\J
C'"
C\J
---- co W
0
...3:
O~
II "'1-
C
.- 0
«
E
«
0
E
..-
!I
C\J
".!
(1)(1)
..-
0
..--. ..- ..-
co
:Ez
---- > 1-
._
0(1)

... "
Cco
!I ~...J
1-(1)
::::JJ:
« « U ...
E E
0 !I 0
C\J C\J o:j" I'-
..--. oco
e- coc/)
-I
(1)
10.:
::::J
« C')
.-
E
0
LL
C\J
II
C\J

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Digital Techniques
Preliminary Module 5 Data Conve rsion
Notes 5 .3 5.3.1 - HO - 18

......
8L~E:18:i :::J
D-
C
ill
:::J
CJl
o
ell
c
«
m

co

L-- -, _

..
c:
o
.-

.....- --.. - - - - - - - - -
..
e
ca
.-
N

ca
~
o
ill
CJl
c
ell
"-
......
:::J
D-
C

C\I

0
(f)
...... "-
:::J 0 ill
D-
...... O ..-- 0 ..-- 0 ..-- o ..-- 0 .0
:::J E
0 ..-- :::J
..-- ..-- 0 0 ..-- 0 0 c
ell 0 >.
.~ "-
CJl C\I ell
..-- ..-- ..-- ..-- 0 o 0 0 c
(5 0
05

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Digita l Techniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 19

TAna'OgUe ground

.
Voltage input Logic output

UA > Us Q = '1'

UA < Us Q = '0'
-
II

UA = Us Previous state *
.
* Hysteresis is present to resolve the cond ition where UA = Us

Figure 9 Comparator Circuit

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Digital Techniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 20

Reference voltage
UR EF = 10 V

r - - --1 + Overflow
08
10.0 V...-- +-----l

07

06

05 Binary
coded
output

B2
8-line
to B1
3-line
encoder BO

02
Combinational
logic

01

00
~ Analogue ground

Figure 10 3-Bit Flash AID Converter


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@
z"'C
=i
(J)
:;- I~I Input Voltage 08 07 06 05 04 03 02 01 00 B2
..
Bt BO Over-
o ~
... CD
CD =:
~ ~ tn 3
:> ;-
~ ;;l .. flow _0
... .
~
c)" ~ ::::J
:>
~~
~

~ D)
-; 1:t .... ~

Q1. <,
Less than 0 V 0 0 0 0 0 0 0 0 0- 0 ~O 0 0 to<
:>
S'
~.
~
:::;
:;;" I - ~

o V to 1.25 V 0 0 0 0 0 0 0 0 '1 0 0 0 0
R<>
~
-;:: ,
~
" .. -- .
0
::+
-s
i:'S
1.25 V to 2.50 V 0 0 0 0 0 0 1 1 0 0 1 0
G>
3
0-
;I
;:;.

2.50 V to 3.75 V 0 0 0 0 O ,~ - 0
-
p-
..1
.....
- 1 1 0 1 0 0
~
g. .
~
:T
en 3.75 V to 5.00 V 0 0 0 0 '" ' 0 .1 1 1 1 0 1 1 0
rofh o
CD Ole.
:<CD co c
?- 5.00 V to 6.25 V 0 0 0
0 0 1 1 1 1 1 1 0 0 0 CD
...
..

... . oi
6.25 V to 7.50 V 0
- 0
~ .
0 1 1 1 1 1 1 1 0 1 0
~

7.50 V to 8.75 V O~ ";. ., 0 1 1 1 1 1 1 1 1 1 0 0


01
Q
ii1
S' 8.75 V to 10.0 V
.. - "", 0 1 1 1 1 1 1 1 1 1 1 1 0
S'
~ , ~
.
~- :l>
0
:::l

g
2:
m
::Il
0
Greater than 10.0 \j
,
- 1 1 1 1 1 1 1 1 1 0 0 0 1
Ol OJ
o
o
cO'
_.
!!! -
:::l
<0
oCD
c:
I:
:::l
Comparator outputs Encoder outputs Ql
~
I!»...... 0-=-1
OJ OJ
I
:D
~ '" _

<t: I
I 0
:::J
<D
g-
CD
~ i ~.
o <ien..Q
0 I
_. c
0
<0
Figure 11 Truth Table of a 3-Bit Flash ADC I\) 0
...... :::J
<D
(J)

For Training Purposes Only Page37


Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5 .3 5.3.1 - HO - 22

fJCliLI If

0 0 0
a 0 a
"-
0)
r- r- r- .....
a 0 a c
:::J
0
en
..... C\J C\J C\J U
:::J o· "-
.....0)en 0 a e-
.....:::J
Q.
C') 1 '6> C') C')
ro
c o
o a 0)
0 a :.a c
«
"-
cu ..... cu
.-::::
0>
r~ .sI ~ ~
"-
:::J
(5 a, co 0 a ttl 3=
L() ~ L() L()
c
..... o
a 0 a :.aI "C
co "-
cu e
~I
co co co 0)
a I
0 a a
II
r-, r-, r-, t>---- (1)
a 1\.. , 0 a 1\ E
o c~ i=
:::JU
1:)
00
m
cu
-0
0)
au
() ....
o
cu
"-
ro
oi:l E
0- m
'-
C)

"-
I .-m
C
0)
N
c
0
a
I
....
.-
"-
..c
U
I
I
o.-
c
>.
en
0)
en
0
A
:::J
0-
" .,..
N
(1)
0)"-
a ........
"- '-
_0 0) ::::s
..c ttl -
~ ~o ~.QIDE
C)
~ .-
cu"-
.....
en ..c
._ 0> .....
u,
0>
c:;:::;
== r- roc .....
0- c '- c
~E - 1\ « 20
U
---
Q.

"-
0) E
8l U 2-D ~l
en0
>.-
(j)u

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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5.3 5.3.1 - HO - 23

e <:6L1 If

0 0 0
a 0 a
......
,- ,- ,- 0.>
......
a 0 a c
::::J
0 ..-.
(/)
...... C\J ...... C\J C\J U C.
::::J a 0.>
...... 0 a >,
0...
...... (/)
......
ro E
::::J '0 C') C') C ca
0 0.>
......
......
0 a ]5
a:
ro ]5 ro
......
.~ q- Q)
q-
0>
(5 co
I
0 a ::::J
......
ro J:
c
I!)
0
I!)
a :t::::
..0
l::-
co
I (J
<0 <0 <0 e
a
r-,
0
r--:
a
r-,
«
Q)
a 0 a c.
"0
ro
-
0
C/)
I
0 Q)
0.> c:
ro
...... 0
ro ca
0-
"I-
0
E
...... a ca
J..
0.> C)
N
o.> ·c ca
.-
-(/)0
......
::::J..c
O-u
c>,
(/)
0 ...
e
.-
~
e
......
.-
J..

(J
0
......
ro
......
ro
0...
E
.,..
M
0 Q)
o J..
~
C)
~~~w
E::::JO>
o...ro
ro ............
......
0
0.........
.-
U-
1I::::J 0 E~
0> roo.>
0.> IIc0.>
::::J 0>
0> ......
0::::J II E~ (/)
_0... o.>uo.>
croc
·- ::J wO(/)
>,- ::::J
« (j)uo...

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@
z"'C
=i
(J)
:;- I~I Analogue
input
Comparator UA > Us = count up
UA < Us = count down
o... CD~
CD =:
~ tn 3
:>
~
~
;-
r' UA~ _.
- .... ,. .
;;l ~
c)" '( ::::J
~
U 0 .-
"

-
:>
~~
~

U~/
0 UP/DOWN - D)

i
-; 1:t ~

Q1. <, ~
to<
:>
S'
~
:::;
:;;.
~.
-C >---- 8-bit
natural binary
..:...

- > ,
.. counter
up/down
0
R<>
~
-;::
-s
CU<-
I' --
::+
G>
3
0-
i:'S
;:;.
0 - T
07 .' 0"6 0.5 04 03 02 01 00
;I
~
Sys tem
cl ck - .. ~ 1 .=' 1r l' 1r ,r U
g.
",..,
07

"
" \
~
:T
en
rofh
Analogue . o
feedback 06
CD
:<CD
- Ole.
c
..
'-' co
?-

Analogue
- , ~
05 CD
oi

DAC output - 04
. -0
-- 8-bit
" Digital
~

': -~ - ,
DAC 03
-0
output

II"""
-
- ........ 02
{)
~
,
01
-0
- ~ ell

~ o
o
--
DO -c
cO'
O1OJ;:::;:
.
• .:l
,.
I •0JOJ
-
:""'0-=-1
-OJ
I 0 <D
I :::J g..
o <
<D :::J
_.
I en..Q
_. c
Figure 14 a-Bit Tracking ADC I\)
.p. :::J
0 <D
(J)

For Training Purposes Only Page40


Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5 .3 5.3.1 - HO - 25

9 69L1 'rid

- - - - --y-- - - - - - - --.
____ ---'-- - - - - - --l
- - - - --r- - - - - - - -.
- - - - -'-- - - - - - - -1 o
c
«C)
c:
.-
~
e
- - - - -,-- - - - - - - --1 m
~
‫ן‬-

m
....
J:
.-
_ _ _ _ -L.. --1 3:
- - - - ....,...- - - - - - ---1 "C
_ _ _ _ -L.. --j
....m
Q)

- - - - ....,...- - - - - - ---1
_ _ _ _ -L.. --j .-
e
- - - - ........- - - - - - - --1
o
tn
- - - - -'-- - - - - - ---1 tn
«
tn
E
~

o
'I-
Q)
>
m
~
It)
,....
Q)
~
~
C)
.-
L1.
ro ......
C ::J-o
0>..-0.0)
.-(/) "- ...... (/)
::J::J
0)00 0. O
::J ::J
0>°0
«E
OU - '-
"-
ro -o..c 0)
......
0.
C 0) ' -::J
«~~ (/)
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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5 .3 5.3.1 - HO - 26

ct:l:J
~Q.
Ol......
.- ::J S!18LII>'
00

~
-------/'...._------:::--..
0 0

a
0 -- o
aT"""
-
-
c
Q)O
C
> '';::; .....
'U) ct:l Q) .-.
(/)E ...... a:
a
C\J

C')
--
-- ..
<t
~
(1)

tn
.-
Q)'- '~ «
UXOlCf)
o 0 Q) .........
::J ..........
a
-
o;:t
C)
(1)
a::
Cf)&
ct:l
a
- e
:s:
-
a-J
I· LO
1,0

:] , a,
CD
"':'"

J.I
- ..
o
.-
m
E
I
(9 0
"- -
- ' ~.

·xo
I a: /\ a r-,
0
CD
0
LO
0 0
o;:t C')
0
C\J
0
T"""
0
0
0 ~
c.
..
c.
...
<t
~o
.0« .-
ebo mI
CO
r ... (1)
...... • •
JQ)::J >
::JQ.
0l:J I'
.-
tn
00 , ~. tn
ct:lo (1)
C« U
«0
a U
0 :::J
CJ)

j\
.....
o
Cti U)
.....
ct:l
Q.
,....
E (1)
o ~
o «
::J
co l
::J --
Q)~
:::J
C)
.-
::Ju
Olct:l u,
0.0
- -0
ct:lQ)
U .~ CQ)
« ......
Q)
::J ..... E~
Ol......
o::J
_Q.
~.~
~II
::J
mo
-
o
o*g
>.-
Cf)U
«
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Digital Techniques
Preliminary Module 5
Data Conversion
Notes 5.3 5.3.1 - HO - 27

Operating Table:

....
1/
Successive approximation register
Correct digital representation (SAR) output at different stages in
I- the conversion

Q7 Q6 Q5 Q4 Q3 Q2 Q1 QO Q7 Q6 Q5 Q4 Q3 Q2 Q1 QO CO

1 0 1 1 0 1 0 0 1 0 0 0 0 0 0 0 1*

1 1 0 0 0 0 0 0 0

1 0 1 0 0 0 0 0 1

1 0 1 1 0 0 0 0 1

, 1 0 1 1 1 0 0 0 0

~[~ 1 0 1 1 0 1 0 0 1

1 0 1 1 0 1 1 0 0

1 0 1 1 0 1 0 1 0

1 0 1 1 0 1 0 0

"
* = initia l outpu t

The colu mn CO ind icates the comparator outpu t

Figure 17 Successive Approximation Register


Conversion Sequence - Operating
Table

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Digital Techniques
Preliminary Module 5 Data Conversion
Notes 5 .3 5.3.1 - HO - 28

:JL8LI'l:1

+-'
:::J
0. ....
+-'Q)
:::J+-'
O.~
-00>
tUQ)
0 ....
~ ----------
-
0
0'>
Q)
e
...J Q)
eQ)
I"- ::::J
C'"
Q)
<.0
en
e
0
~
LO 0
.-
..--.. tn
0
~

-
Q)
~
r- Q)
II
C')
>
c:
C\J
..--..
0 0
0
r-
C\J
U
0
r-
r-
m
+-'
:::J
0. ....
0
r-
----
r- ""'0"
+-' Q)
:::J+-'
o .~
-00>
tUQ)
0 ....
~ - ----+----- -
0
0'>
E
m
~
C)
...J Q)
m
.-
I"-
C
C)
Q)
() <.0
e
.-
>.
o
c
E
.-
0
.U)
LO I-
....Q)
Q)
>
C
0
~ ,....
o Q)
Q) C') ~
c
a ::::J
C)
C\J .-
L1.

o
tU '5
.~ 0. C\J
O>+-' r-
.- :::J
00

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Digital Techniques
Preliminary Module 5
Data Buses
Notes 5.4 5.4 .1 - HO - 1

5.4 Data Buses

5.4.1 Introduction to Data Buses

Refer to Figure 1.

In a modern aircraft, the cockpit crew is provided with many different information.
To handle this amount of data with a minimum of manpower and 'in time ', it is
necessary to reduce the numbe r of indicators in the cockpi t, i.e. no longe r using a
separate indicator for each system/se nsor.

Refer to Figure 2.

This is achieved by display ing all data from the various systems on some few
'multi- purpose indicators' .

A system which handles the flow and display of data of many or all aircraft systems is
called an 'integrated digital avion ic system '.

The adva ntages of such a system are


o it provides a better overview over the actua l condition of each connected sys-
tem
o it reduces the flight crew's work load
o less time (and money) is required for maintenance
o it saves electrical power consumption
o the weig ht is reduced (wiring, units) .

Refer to Figure 3.

A digital avion ic syste m replaces the former instrumentation by an electronic flight


instru ment system (EFIS) and/o r an engine indication and crew alerti ng syste m
(EICAS) . This includes the change fro m old analogue equipment to modern syste ms,
because digita l outputs are required .

Refer to Figure 4.

The new generation of aircraft avionics is highly integrated. It saves electrical power
and weight. It provides high accu racy and reliability. Th e level of integration va ries
(whether only the main avion ic systems are combined or all), depending on the type
of aircraft .

An esse ntial fu nction of an integrated digital avio nic system is the exchange of
information betwee n subsyste ms and/or betwee n line replaceable units (LRU) within
a subsystem.

Note : A line- replaceable unit (LRU) (also called 'black box') is a unit, which can be
replaced at flight- line level in a short time.

To incorporate a fully integrated digital avion ic system and to ensure the required
information exc hange, a digital data bus is required. Th is bus is used to provide a
two-way interface between va rious compu ters, sensors and indicators .

The interface between computers and/or external devices (e.g. tra nsceivers ,
receivers) is accomplished via the digita l data bus. Data may travel 'oneway' or in
two directio ns, dependi ng on the system design.

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Digital Techniq ues
Preliminary Module 5
Data Buses
Notes 5.4 5.4 .1 - HO - 2

Refer to Figure 5.

Typically, the data bus is a seria l bus on which the data are transmitted sequentially,
i.e. one word after the other. A serial bus is common ly used for long-distance data
transmissions (more than 50 m) as required in large aircraft.

The bus is made up of a twisted pair of wires which are shielded and jacketed.
The shielding is grounded at all terminal ends and breako uts to keep bit distortion at
a low level. Shield grounding and high vo ltage spike protection within the individual
data-receiving components ensure accu rate transmissions.

Transmission of data within micro -computers , between micro- computers and


external devices as well as between other compo nents can be acco mplished with
8- , 16- ,32- and 64-bit digital data words , depending on the system layout.

Some of these information are in the form of discrete data. Typically, these data are
formed by switching betwee n +28 V DC and open (or between ground and open) .
Discrete data are carried on a sing le wire.

This type of information is used for annunciators , warnings and wherever simp le
'condition information' is sufficient. This is a small portion of the total information
interchange.

There are different data bus systems found and used in an integrated digital avionic
syste m. Each bus system has its own organization in terms of address ing, data,
wordsize, electrica l characteristics and speed accord ing to certain sta ndards .

Some of these standards are:


o Aero nautical Radio Incorporation (ARI NC) 429 Bus
o Com mercia l Standard Digital Bus (CSDB)
o RS 422
o RS 232
o MIL-STD- 1553
o Avionic Stan dard Com munication Bus (ASCB).

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.1 - HO - 3

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.1 - HO - 4

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.1 - HO - 5

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.1 - HO - 6

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .1 - HO - 7

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Digital Techniques
Preliminary Module 5
Data Buses
Notes 5.4 5.4 .2 - HO - 1

5.4.2 Bus Architecture

5.4.2. 1 ARINC 429

Introduction

Refer to Figure 1.
Aero nautica l Rad io Incorporated (ARINC) is a corporation in whic h comme rcial
airlines are the main shareholders. Other shareholders include air transport
companies, aircraft manufacturers and aircraft equipment manufacturers.
Amongst their activities , ARINC sponsors the '8 irlines .Electronic .Engineeri ng
.Qommittee ' (AEEC) to formulate sta ndards for electro nic equipment and systems for
commercial airlines.
One of these standard is the 'ARINC 429 ' Mark 33 Oigital lnformation Iransfer
~ystem (OITS) . Th e first revision 'ARINC 429 -1 ' was issued on 11th April , 1978 .
The current specification is 'ARINC 429 -10'.
There are two main advantages in standardizing a digital information transfer system :
o Significant savi ngs in size and weigh t of avion ic units and the interc onnecting
wiring between them
o Cost sav ings , since a unit can be used on different aircraft with little or no
modification.
The ARINC 429 bus system is made up of transm itters (source) and receivers (sink)
con nected by shielde d, twisted wire pairs.
Data is tra nsmitted by a single transm itter to either a single receiver or a gro up of up
to 20 receivers con nected in para llel.
Each ARINC 429 bus carries data in one direction only. Bi-directio nal transm ission
betwee n two line-replaceable units (LRUs) must be acco mplished by using two sets
of transm itters , receivers and tw isted -wire-pai r buses .
Each LRU must have its own transmitter and its own receiver.

Word Str ucture Accordi ng to ARINC 429


ARINC 429 transmi ssions consist of 'words' made up of 32 bits. These wo rds are
transm itted at 12.5 kHz (low speed) or 100 kHz (high speed) . Bit 1 is always the first
bit transmitted, bit 32 is always the last.
Bits 1 to 8 are called the 'octal label', which identifies the type of information
contained within the wo rd. For exa mple, gro und speed has an octal label of 312 .
In most cases , bits 9 and 10 are the sou rce/destlnatlon identifier (SOl) , whic h
indicates the sou rce LRU in a multi-box installation by system number (1 to 4).
Bits 9 and 10 may also be used as data bits in high- resolution data words .
Bits 11 to 29 (or 28) comp ose the data field. Bit 11 is the least .§.ignifica nt g,it (LSB) ,
bit 29 (or 28) is the most .§.ignificant g,it (MSB) . If the datafield consists of bits 11 to 29
the data are in g,inary-.Qoded gecimal (BCD) format. If the datafield consists of
bits 11 to 28 the data are in g,inary (BNR) format.
Bit 30 and 31 (or 29 , 30 and 31) form the .§.ign .§.tatus matrix (SSM) , which identifies
the sign and va lidity of the data . Bit 32 is used for parity.

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Data Buses
Notes 5.4 5.4.2 - HO - 2

Label Assignment According to ARINC 429

Refer to Figure 2.

In the octal label, bits 1 to 8 are used to represe nt numbers of 0 - 377 . The 8 bits are
divided into tw o grou ps of 3 bits and one group of 2 bits. Each group represents a
digit encoded in binary.

The octal label is transm itted with the most significant bit (MSB) (bit 1) of the most
significa nt digit first. Th is 'reversed label' characteristic is a legacy from past systems
in which the octal coding of the label field was of no particu lar significa nce.

Examp le: In the follo wing tab le, line one shows the label '230' =true airspeed', line two
shows the label '312'= ground spe ed.
, \
.
Bit number 8 7 6 5 4 3 2 1
- r

LSB MSB
Octa l value • (1 2 4) (1 2 4) (1 2)
1 10 0 0 1 1 0 0 1
Decoded I'• ~ . 0 3 2
'"
2 0 . 1 0 1 0 0 1 1
Decoded 2 1 3

Data Field

Units, ranges, resolution, refresh rate and number of significant bit for the inform a-
tion transferred are encoded in either binary-coded decimal (BCD) (Figure 3,
detail b)) or binary (BNR) (detail a)) (two's complement) fract ional notat ion. Discret e
information is also sent via the ARINC 429 bus.

If the datafi eld contains bits in a binary (BNR) format, the most significant bit of the
data field represents one half of the maximum possib le of the va lue transm itted.

Each successive (less significant) bit represe nts one half of the previous (more
sign ificant) bit. Negative numbers are encoded as the two's comp lement of positive
values. The negative sign is reflected in the sign/stat us matrix .

If the datafi eld bits 11 to 29 contain bits in a binary- coded decimal (BCD) format,
the data is grouped into 4 bit digits, each denoting a decimal column.

The 19 data bits are broken up into four groups of 4 bits and one group of 3 bits .
Each group of 4 can represent a number fro m 0 to 9. The fifth group can represent a
number fro m 0 to 7.

In the data field, only those bits, which are required to transmit parameter range and
resolution, are used. The remaining bits are set to logic 0 and designated as ga ds (P)
(detail c)) .

Angles 0° to 359,,(xx o are encod ed as 0° to ::!:179.xxxo. The positive portion of the


semicircle represents 0° to 179.xxx O. The negative portion includes 180° to 359.xxx o.
An 'all zeros' configuration represents 0° and 180° degrees.

An 'all ones' configuration represents 179.xxx o and 359.xxx o. two's comp lement
notation is used for the negative half in combi nation with the sign bit.

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Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 3

Data Types

Following data types are used in ARINC 429:


o BNR binary data expressed in fractional two's
compleme nt notation
o BCD the numerical subset of ISO alphabet no. 5
o Discrete data, used in two ways
as part of a BNR or BCD
or, when using labels 270 to 276, the data
field bits 11 to 29 are used for discrete
data messages
o Maintenance data can be made up of BNR, BCD and discrete data.
o AIM data (acknowledge, ISO alphabet no. 5 and maintenance data)
this type of data is used, when the 'data
package ' contains more than 21 bits of
information. The data package would be
divided into data words (i.e. initial word ,
intermediate word and final word).

Sign/Status Matrix

Refer to Figure 4.

Figure 4 shows the sign status matrix for a binary (BNR) and binary- coded decimal
(BCD) word format.

Parity Check

The parity check is one of the simplest of all error checking methods used in data
handling. There are two basic parity configurations: odd and even. ARINC 429
transmissions are always of 'odd parity'.

Bit 32 is the parity bit. ARINC 429 receivers are programmed to always expect an
odd number of binary ones in each 32 bit word.

Bit 32 is set to logic 1(one) when there is an even number of binary ones in the word.
It is set to logic 0 (zero) when there is an odd number of binary ones in the word.

This creates a word which always contains an overall odd number of ones.

Trans missi o n Wavefo rm

ARINC 429 transmissions return to the 'zero voltage ' condition at the end of each bit
period. As shown in Fig ure 5, a 'high' on line A and a 'low' on line B represent a
binary one. A 'low' on line A and a 'high' on line B represents a binary zero .

When both lines A and B are at zero volt, there are no data tra nsmitted.

ARINC 429 transmitters must provide a minimum dead time of 4 bits between
messages because the receivers synchronize to the transmitted data by recognizing
the 4-bit dead time as the synchronizing command.

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Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 4

Electrical Parameters

Refer to Figu re 6.
Tri- Ievel bipolar modulation consists of 'Hi' (binary one), 'Lo' (binary zero) and 'Null'
(no data) . When the transmitte r is open-circuit, the differential output signal vo ltages
across the spec ified output terminals (balanced to ground at the transmitte r) are:
o 'Null' - 0.5 V to +0.5 V
o 'Hi' +9.0 V to +11 V
o 'Lo' - 9.0 V to - 11 V.
The differential voltag e presented at the receiver is dependent upon the line length
and the number of receivers connected to a transm itter. Noise and pulse disto rtion
will also affect these vo ltage levels. Th erefore, receivers should be designed to
accept the followi ng vo ltage ranges for the th ree states:
o 'Null' +2.5 V to -2.5 V
o 'Hi' +5.0Vto +13 V
o 'Lo' - 5.0 V to - 13 V.

Note: Common receiver input mode vo ltages (line A to ground and line B to ground) are
not spec ified because of the difficulties of defining 'ground' precise ly.
The transmitter output impedance is 75 Q balanced to ground. Th e receiver input
impedance is typically 8,000 Q. No more than 20 receivers (400 Q minimu m for
20 receiver loads) should be connected to one digita l data bus.
Each receiver contains isolation provisions to ensure that the occurrence of any
reasonab ly probable failure does not cause loss of data to the others . Bus fau lt
tolerances for shorts and steady state voltages are designed into the transm itters
and receivers.

5.4.2.2 RS 422, RS 232

RS 422 and RS 232 are electrical specifications as defined by the E.lectronic


I ndustries Association (EIA) for a serial databus.

5.4.2.3 Commercial Standard Data Bus

The commercial standard data bus (CSDB) is an unidirectional bus like the ARINC
429, but with a differe nt organization and different characteristics.

5.4.2.4 MIL-STD-1553

Note: A glossary of the terms used in MIL- STD-1 553 is provided at the end of this
Chapter.

History and Backg round

During the mid-1960's, there was a growing complexity in integrated avionic


syste ms. This additional complexity resulted in a growi ng number of discrete
interconnections between va rious components on an aircraft , providing both
additional size and weight.

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Preliminary Module 5
Data Buses
Notes 5.4 5.4.2 - HO - 5

To deal with this increasing complexity, the Aerospace Branch of the ,S,ociety of
8 utomotive ,Engineers (SAE) developed the first draft of a multiplexed data bus
standard in 1968.

The US Department of Defense adopted the draft as MIL-STD - 1553, to be used and
applied by the military services and thei r contractors. The military standa rd estab-
lished engineering and tec hnical require ments for processes , proced ures, practices
and methods. The sta ndard was amended in 1978 to MIL-STD -1553B.

MIL-STD -1553B sets the guide - lines for time -division multiplexing. This is the
transmission of data between several avionic units over a 'single twisted shielded
pair' cable.

Communications betwee n different units can take place at different moments in time.
All communications between units shar e the same bus. The standa rd is now used on
new military airplane and helicopter syste ms, space systems and even land-based
vehic les.

There are two main advantages in sta ndardizing a digital time-division multiplex data
bus:
o Significant savings in size and weight of avionic units and the interconnecting
wiring between them
o Cost savings , since a unit can be used on different aircraft with little or no
modification.

Structu re

Refer to Figu re 7.

MIL-STD-1553 defines th ree types of terminals:


o .6.us .Qontroller (BC)
o B.emote term inal (RT)
o .6.us monitor (BM).

MIL-STD-1553 states that the bus controller transmits and receives data ,
and coordi nates the flow of information on the data bus. All information is communi-
cated in com mand/response mode.

This mode ensures that the 'sole contro l of information transmission on the bus shall
reside with the bus controlle r, which sha ll initiate all transmissions .'

The remote te rminal gathers informatio n, for examp le, from aircraft sensors .
It formats this data for transfer on the data bus. The remote terminal can also receive
information from the data bus and conve rt this data to a format suitable fo r. use by the
aircraft.

The remote terminal may contain little or no intelligence, such as a simple interface
unit, or may be a full avionics computer. The standard allows for up to 32 remote
term inals to be connected to the data bus.

The bus monitor listens to the information flowing on the bus and records all or
selected pieces of data. The bus monitor may record data for later analys is, as in a
flight test progra m. It is strictly passive and is used only as a test device.

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Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 6

Summary of the main aspects of MIL-STD -1553:


o Up to 32 remote term inals can be connected to the data bus
o Information must be transferred in a command/ response mode
o No remote terminal shall 'speak' unless addressed first by the bus controller
and specifically commanded to transmit.

Data to be Transferred

MIL- STD-1 553 also defines the information that will flow on the data bus.
This informatio n can be one of the following three words:
o Command word
o Status word
o Data word.

The command word is transm itted only by the bus controlle r. This word directs a
remote te rminal to either transmit or receive information across the data bus.

The status word is transm itted only by a remote te rminal. This word indicates the
genera l status of the remote terminal. It indicates whether any error conditions were
detected in the information received by the remote term inal, or other general RT
stat us conditions.

The data word is transmitted by the bus controller or a remote term inal. This word
contains the actual information that will be transferred from one avionic unit to
another, across the bus.

Bus Co ntroller

The bus controlle r (BC) is an avion ics computer that controls the flow of information
on the data bus. It transmits commands to remote te rminals at predete rmined times .
The command may be followed by data words , or it may request data from a remote
term inal (RT).

The BC must be able to respond to changes in the aircraft environment.


These changes may be the result of deliberate action of the pilot (such as changing
the aircraft mode from air-to-ground attack mode to air-to-air combat mode) .

Changes in the aircraft may also be the result of some unexpected event (such as an
avionic unit failure or battle damage). Regardless of the cause , the BC must be able
to respond to the change.

In the case of some unplanned event , such as an RT failure, the BC has the
capability of detecting the occurrence of an error on the data bus. The Be will then
take action to recover from the error condition.

For a planned change , such as a mode change in the aircraft, a BC will tYpically
modify the flow of information on the bus in a predetermined way. The BC changes
the sequence and frequency of messages between RTs.

During error detection, the BC will typically retransmit a command to the suspected
RT. If multiple attempts of transmitting to a RT result in errors, the BC will try to
establish communications with the failing RT on the redundant (back-up) data bus.

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Data Buses
Notes 5.4 5.4.2 - HO - 7

Remote Terminal

A remote termi nal (RT) is an avionics unit designed to tra nsfer data between an
aircraft subsystem and the MIL- STD-1 553 data bus. It may be fitted within the
subsystem it is interfacing, or it may stand alone, external to the interfaced subsys -
tem.

A MIL-STD - 1553 remote terminal does more than simply reformat and transfer data
between the aircraft subsystem and the data bus. It receives and decodes com-
mands from the bus controller (Be) , follow ing the prescribed protoco l
of MI ~-STD -1553 .

An RT detects errors in transmissions from the BC and responds to these errors


acco rding to the spec ification . The RT must be able to proper ly handle both protoco l
and electrica l errors.

A protoco l error is an error where the incoming com mand word and data words are
electrically correct, but the message deviates from the protoco l estab lished by
MIL-STD-1553. For examp le, a protoco l error occurs when commands are followed
by an incorrect number of data words.

An electrical error is where the command and/or data words received from the BC
contain some sort of waveform error, such as rise or fall time violations or excess ive
ringing.

Bus Monitor

A bus monitor (8M) is a unit used for data bus testing . It can be attached to an
aircraft's data bus during flight-testing . In this manner, it is used to examine the flow
of information on the data bus in real time. The BM can also store all or selected
messages for later analys is.

As a laboratory bus tester, the 8M examines all the traffic flowing on a


MIL-STD-1553 bus. It detects and records electrica l and protocol errors.
The bus monitor can generally be used to display 'snap- shots' of the bus traffic.

Data Bus

The fourth integral part of MIL- STD- 1553 is the data bus. The tech nical definition of
a data bus is 'a twisted shielded pair tra nsmission line made up of a main bus and a
number of attached stubs '. In short , a data bus is a cable whose electrica l character-
istics are defined by MIL-STD -1553.

There are two different ways of connecting a terminal to the data bus:
o Directly coupled (Figure 8, detail a))
o Transformer coupled (detail b)).
These connections are referred to as 'stubs'. There are two differences between
these types of coupling . Direct coupling can only be used with stubs less than one
foot (approxi mately 30 cm) long. With direct coupli ng, the transformer and isolation
resistors are internal.

Transformer coupling is used with stub lengths less than 20 feet


(approximately 6.1 m). A second tra nsformer is added and the transformers and
isolation resistors are external to the remote terminal in their own box.

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Data Buses
Notes 5.4 5.4.2 - HO - 8

Word Types

Refer to Figure 9.
As mentioned before, there are three distinct types of words defined
by MIL-STD-1553:
o Com mand words
o Status words
o Data words.
The bits are encoded in each of the words using Manchester II bi-phase encoding.
In a Manches ter format, bit values of one are positive for a Y~ - b i t period, followed by
a negative level for a Y~- b it period . Zero va lues are the opposite , a negative level is
followed by a positive one.
The sync pattern is a unique invalid Manchester encod ing that indicates the start of
each word .
A command sync is positive level for 1 Y~ - bit periods followed by a negative level for
1 l/~ - bit periods.
A data sync is reversed.
A status sync is identica l to a command sync. Command and status words are
differentiated by both word content and tempora l context , i.e., the occu rrence of such
a sync in the timing of a message. Figure 9 shows the various Manchester II
encoded patterns . The MIL-STD -1553 bus is a differential bus. The waveforms
shown are for the positive leg of the bus. Of course , the negative leg is exactly the
oppos ite.
Each of the three word types has a unique format. All three have a com mon
structu re. They contain a com mand sync or a data sync . The sync character is
always tra nsmitted first, followed by 16 information bits. The parity bit is always
transmitted last.
This extra bit ensures that , if a hardware failure occu rs and a bit is lost in trans-
mission, its loss can be detected. All words transmitted on a MIL-STD - 1553 bus
must have odd parity.

Command Words

Refer to Figu re 10.


The command word consists of 16 bits divided into four distinct fields. The command
word always begins with a command sync character. A 5-bit remote term inal address
field always follows the sync character. The purpose of the address field is to identify
to which RT a com mand is being tra nsmitted . Each RT in a system is assigned a
unique address .
The RT examines the address field of all incoming commands. If the address field
matches the address of the remote term inal, the RT will act on the remainder of the
comman d.
If the address field of the command does not match the address of the RT,
the command is ignored. The limitation of a maximum of 32 te rminals on
a MIL-STD -1553 data bus results from this 5-bit address fie ld. The RT address
range is 0 to 31.

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Preliminary Module 5
Data Buses
Notes 5.4 5.4.2 - HO - 9

MIL- STD- 1553B exte nded the RT add ress protocol defi nitio n to include broadcast
messages , i. e., commands from the BC to all RTs simu ltaneously. RT add ress 31
was defined as the broadcast RT.

Individua l RTs could enable or disable the processing of broadcast messages, but no
RT cou ld respo nd as a singu lar RT to th e broadcast address. This limits the number
of RTs in a MIL-STD - 1553B bus system to 31, plus the broadcast address .

The next field is only one bit in lengt h. The transmit/receive (T/R) bit indicates the
actio n requ ired of th e remote term inal. The point of view for th is bit is from the RT,
that is, if the BC commands the RT to transmit data (data flow fro m RT to BC ,
T/ R bit is logic 1) or receive data (data flow from BC to RT, T/R bits is logic 0):
o Logic 1 = RT is to transmit data in response to the command
o Logic 0 = RT is to rece ive data along with the command.

The sub-address/mode fie ld follows the T/R bit. A su b-address is a function or an


area within th e RT to which the command is being directed . Th e sub -address directs
the RT to a specific grouping of data to be transmitted onto the bus , or it tells the RT
what to do with th e data it is about to receive.

MIL -STD -1553A defined one special sub -add ress , sub-add ress 0, as the 'mode
code sub-address'. MIL-STD-1553B extended this definition to also include
sub-address 31 . All other va lues of this field indicate a remote te rminal sub -address
to which th e com mand is being directed .

MIL-STD-1553 defines a se ries of commands to aid in the management of the data


bus and the electrical control of the RTs as opposed to typical data transfe r com-
mands . Th ese com man ds are called mode control comma nds , mode code com-
mands or mode commands .

Some examples of mode commands are:


o Reset RT
o Initiate self-test
o Transmit last comma nd.

Note: Mode commands exchange usu ally one -data words and may contai n even no
data words at all.

Almost every aircraft specification requires at least a basic subset of the mode
commands to be implemented.

The final field in a comma nd is the word cou nt/mode code field. This 5-bit field either
specifies the mode comma nd or the number of words which are to be exc hanged
with the BC.

W hen th e previo us field (the sub-address/mode field) is all zeros or all ones ,
the word cou nt/ mode code fie ld uniquely identifies whic h mode command is tiei ng
transmitted . In this way , up to 32 different mode commands can be specified.

When th e com mand is not a mode code , the word count/mode code field identifies
the number of data wo rds that are to be exc hanged along with this command.

Refe r to Figure 11.

The table in Figure 11 su mma rizes the mode commands defined by


MIL-STD-1553B.

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Data Buses
Notes 5.4 5.4.2 - HO - 10

Sample Com mands

1. BC transmits 10110 00101 01001


Address field 10110 (RT with the address 22)
T/R bit 1 (transmit)
Sub -address/mode 00101 (sub-address 5)
Word count/mode code 01001 (9 words)
2. B€ transmits 01010 00000 00011
Address field 01010 (RT with the address 10)
T/R bit 1 (transmit)
Sub -address/mode 00000 (mode com mand)
Word count/mode code 00011 (initiate
self- test) .

Status Words

Refer to Figure 12.


The status words transfe r status information from the RT to the BC. This information
describes the condition of the RT, whet her the RT detected any errors in the
command or data words it just received , etc .
A status word is only transmitted by an RT in response to a com mand from the BC.
Like the com mand word , it always begins with a com mand sync and a remote
term inal address.
The purpose of tra nsmitting the RT address in a status response is twofold:
o First, it allows the BC to verify that the stat us response is from the correct RT
and that the last command was not misinterpreted
o Secondly, it prevents any other RT from mistaki ng the status response as a
command, since the sync pattern for both is the same .
If an RT mistake nly decodes another RT's stat us response as a command , it will find
that the address does not match its own, and will ignore the command. Following the
address field, there are 11 bits, 8 of whic h are defined by MIL-STD - 1553B.
The remaining 3 bits are undefined but reserved for future use.
The bit immediately following the remote terminal address field is the message error
bit. This bit, when set to logic 1, is used by the RT to indicate that something was
wrong with the com mand or data words it just received from the BC.
The message error bit is set when any of the following conditions occur:
o A data word received from the bus controller contains an error
o A gap is detected between data words
o A received comma nd is not implemented by the RT
o Th e wrong number of data words is received by the RT.
If an error occu rs in a message , the sendi ng of the stat us word is supp ressed .
The BC must use the 'transmit last status ' mode command to attempt to determ ine
the reason for no response.

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Data Buses
Notes 5.4 5.4.2 - HO - 11

The message error bit is set until it is transmitted in a stat us or until a new valid
command other than a 'transmit last status ' mode comma nd is received by this RT.

The instrumentation bit follows the message error bit. It is an optional bit used to
differentiate between command and stat us words. This bit should always be zero.

The service request bit indicates that the RT requires service. Setting this bit can
direct the BC to undertake a predefined data transfer or mode command. This bit is
also optional. If it is not implemented, it must always be a logic O.

The next 3 bits are reserved and must always be a logic O.

The broadcast command received bit is used by a RT to indicate that it received a


valid broadcast com mand. When a broadcast command is received , the bit is set to
logic 1 and remains set until it is either trans mitted or until a va lid non- broadcast
command is received by this RT. If not impleme nted, it is set to logic O.

The busy bit is an optional bit, which indicates that the RT is unable to move data to
or fro m the subsystem in response to a com mand. Once set , it remains a logic 1 as
long as the busy condition exists. If this bit is not used, it must be set to logic O.

The subsystem flag bit is an optional bit used by an RT to alert the BC that a fault
exists in the subsyste m and the data being tra nsmitted may be invalid. A logic 1
indicates the presence of a fault condition and a logic 0 its absence . Once set, it will
remain active until the subsystem fault is resolved. If the subsyste m flag bit is not
used, it must be set to logic O.

The dynamic bus control acceptance bit is an optional bit. If not used, it should be set
to logic O. When set to logic 1, it indicates to the BC that the RT has accepted the
dynamic bus control mode command and will immediately take over the task of bus
control as the back- up bus controller.

The bit is cleared upon transmission. If the RT rejects dynamic bus control, it sets
this bit to logic O.

The terminal flag bit is also optio nal. Like the others , if not used, it must be set to
logic O. When set to logic 1, the terminal flag bit indicates the existence of a fault in
the RT itself. It will remain set until the condition causing the fau lt is resolved.

Data Words

Refer to Figure 13.

Data words contain the actual information that is to be transferred between RTs and
the BC, or betwee n RTs. They may be transmitted by either the BC or an RT. Data
words contai n the most information , yet they are the least struct ured types of word in
MIL-STD-1553. A data word format is shown in Figure 13.

Data words
o begin with a data sync
o have 16 information bits
o end with a parity bit
o are transm itted with the most significant bit first.

No standard exists which desc ribes the contents of a data word. The contents and
format of a data word vary from unit to unit and aircraft to aircraft.

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Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 12

Basic Bus Protoco l

Refer to Figu re 14.


'Protocol' means the relationship of how the three types of MIL- STD-1 553 words are
used to transfer data between termi nals. The MIL-STD -1553 protoco l defines ten
different types of messages with the follow ing requirements:
o All messages begin with a command from the BC
o Th ere must be a minimum gap between messages
o If an RT is to respond to a command, that response must begin with a status
word
o Th ere cannot be any gaps between data words .
There are two types of intervals (in [IS) used in the bus protoco l:
o RT response time
o Intermessage gap time.
The RT response time is the spec ific time window during which the remote terminal
must respond. It is required to be within the range of 4 [IS to 12 lis .
The intermessage gap time is a minimum time period of 4 [IS between messages.
Both times are measured between the zero cross ing of the parity bit and the zero
crossing of the sync bit.
The RT will only respond with a status word if there are no errors in a message.

Transfers

BC-fa-RT

Refer to Figure 15.


This is the simplest type of transfer. The BC sends data to an RT. The T/R bit in the
command is set to logic 0, indicating that the RT is to receive data. The receiving RT
validates the incoming command and data words. If the message meets all the
valid ity requirements outlined in MIL-STD - 1553B, the RT responds with a stat us
word, acknow ledging the reception of the com mand and data.

RT -fa -BC

Refer to Fig ure 16.


The BC sends a command onto the data bus. In this command, the address field is
set to the address of the RT from which the BC requests data. The T/R bit is set to
logic 1 indicat ing that the RT is to transmit data. The word count field indicates the
number of data words that are to be transferred. After validating the command,
the RT responds with its status word and the appropr iate number of data words .

RT -fa -RT

Refer to Figure 17.


The BC directs this type of transfer. It transmits two 'back- to- back' commands:
o The first for the RT whic h is to receive the data
o The second for the RT which is to transmit the data.

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Data Buses
Notes 5.4 5.4.2 - HO - 13

In the first command (the receive command) the address field contains the address
°
of the receiving RT. The T/R bit is set to logic indicating that the RT is to receive
data words. The word count field indicates the number of data words the RT should
expect to receive.
In the seco nd com mand (the tra nsmit command) the address field contai ns the
address of the RT which is to transmit the data words . The T/R bit is set to logic 1.
Finally, the word count field indicates the number of data words the RT shou ld
transm it.

Note: The address in the receive command must always be different from the address
in the transm it command.
In order to make an RT-to- RT tra nsfer work , it is necessary that the word count
fields in both the tra nsmit command and the receive command match.

Commands

Mode Commands without a Data Word


Refer to Figure 18.
The BC issues a command to an RT with the T/R bit set to logic 1 and the sub-ad-
dress mode field equal to 'all zeros ' or 'all ones'. The word count fie ld now contains
the mode code for the com mand to be impleme nted.
Mode commands, that do not require data, will include reset and self-test com-
mands. The remote terminal, after va lidating the command , responds with its status
word.

Mode Commands With a Data Word (Transmit)


Refer to Figure 19.
Certain types of mode commands require the RT to send back a single data word
along with the status response , for example, to report a built- in test (BI1) word ,
or to transmit the last received command.
For this type of command , the T/R bit is set to logic 1, indicati ng that the RT is to
transmit data. The sub-address/mode field is set to 'all zeros ' or 'all ones', indicating
a mode command. The word count field identifies the particular command being
implemente d.
After receiving and va lidating the command , the RT responds with its stat us word
and a single data word . The content of the word count field in a particular command
determ ines if a mode command has an associated data word .

Mode Commands With a Data Word (Receive)


Refer to Figure 20.
For this type of command , the T/R bit is set to logic 0, indicating that the RT is to
receive data. Examples of this type of com mand can be a selected transmitter
shut-down, where a data word might contain encoded information concerning which
transmitter.
After receiving and va lidating the command , the RT responds with its stat us word.
The content of the word count field in a particu lar com mand determ ines if a mode
comman d has an associated data word .

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Digital Techniques
Preliminary Module 5
Data Buses
Notes 5.4 5.4.2 - HO - 14

Broadcast

Refer to Figure 21.

As part of MIL-STD - 1553 B, the BC can dissem inate informatio n to all remote
terminals at the same time. The four types of broadcast comma nd correspo nd with
some of the transfe rs and mode commands mentioned above :
o BC-to -RT transfer
o RT- to- RT transfer
[JJ Mode com mand with data word (receive)
o Mode com mand without data word.

The BC always tra nsmits broadcast com mands to RT address 31 (11111) .


The receiving RTs do not respond with status words to the broadcast commands .
When receiving a command with this address, all remote term inals with the broad-
cast option accept the command (and data , if any), as if the com mand had been
directed to them.

With the exception of the transm it command portion of the RT- to- RT transfer (where
one RT is selected to broadcast data to all other RTs) a broadcast command cannot
be a transmit command.

Multiple RTs respondi ng to a transmit com mand by sending data onto a single bus
would provide corrupt data. Likewise, RTs cannot respond with a status due to this
bus collision problem .

Note: For an RT-to- RT broadcast transfer, the receive command is the broadcast
com mand. The transmit command is sent to the RT which is to provide the
broadcas t data. Likewise , the status respond is that of the transmitti ng RT.

The RT sets the broadcas t command received bit in the RT's status word . The bus
controlle r determines whethe r a broadcast command was property received by
polling each remote te rminal, requesting its status word th rough a 'transmit last
status' mode code command, and check ing if the 'broadcast command received' bit
is set.

Message Validatio n

Message validation depends upon the RT to detect electrical and protocol errors in a
message and to validate the command and data words received from the BC.

There are two classes of words and messages containing errors:


o Invalid
o Illegal.

Invalid

An invalid word is a com mand or data word that contains any or all of the following
conditions :
o An improper sync character
o A bit with an invalid Manchester II code
o Th e wrong parity (16 bits plus parity).

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Digital Tec hniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 15

An invalid message is a message that is defined by one or more of the followi ng


conditions:
D An invalid word
D Discontinuous data:
A condition where a gap exists between any two data words, between the
command word and the data words , or between the transmit status and the
data words
D A word count error:
A condition where the RT did not receive the correct number of data words
based on the T/R bit, sub-address/mode field and word count/mode code
field.

Illegal

An illegal command is a command that a remote terminal was not designed to


accept. A command to an unimplemented sub -address/mode code results in an
illegal command as well.

If an RT detects a command word with a validity error (bad sync, Manchester error,
the wrong number of bits, etc.) it will ignore the whole message. In other words ,
no error flags are set.

The RT disrega rds the entire message. It should not respond to a message
containing this class or error. Because the error was in the command word, there is
no assurance that the command was for this RT in the first place.

When an RT detects validity errors in the data portion of a message, it should set the
message error bit in the status word. The sending of the status word is still sup-
pressed. The message error bit could be retrieved by the BC following a no- re-
sponse timeout by using the 'transmit status word' mode command.

The BC must validate status words and data words from an RT. If the BC detects
errors, it must also disrega rd the information received.

Electrical Characteristics

MIL-STD -1553 defines the wavefor m output of a termi nal and the input with which a
terminal is required to work .

Note: The full realm of MIL-STD-1553 electrical verificat ion is beyond the scope of this
lecture.

Glossary of MIL-STD- 1553 Terms

Broadcast comma nd rece ive bit:: This bit is used by a remote terminal to indicate
that it has received a valid broadcast command.

Bus contro ller: A device that coordinates the flow of information on the data bus.

Bus monito r: A passive unit used for data bus testing. It listens to all information
flowing on the bus and records all or selected pieces of data.

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Data Buses
Notes 5.4 5.4.2 - HO - 16

Busy bit:: This bit indicates that the remote termi nal is unable to move data to or
from the subsystem in response to a command .

Command sync: A structu re common to MIL-STD-1553 words . It consists of a


positive level for 1 Y: bit periods followed by a negative level for 1 Y: bit periods .

Data bus: A cable for tra nsferring data and electrical signals betwee n the central
processing unit, storage and all the input/o utput devices of a computer system .

Data sync : A structure commo n to MIL- STD- 1553 words . It cons ists of a negative
level for 1 Y: bit periods followed by a positive level for 1 Y: bit periods .

Data word: A word transm itted by the bus controller or remote terminal(s). This word
contains informat ion to be transferred from the bus controller to the remote te rminals
and information to be transferred between remote termi nal(s) and the bus controller,
or between two remote te rminals .

Dynamic bus contro l accepta nce bit:: An optional stat us word bit. If it is set to
logic 1, this bit indicates to the bus contro ller that the remote terminal has accepted
the dynamic bus control mode command . The remote terminal will immediately sta rt
bus control as the back - up bus controller.

Electric error: An error where the comma nd and/or data words received from the
bus cont roller conta in some sort of waveform error.

Illegal comma nd: A command , a remote terminal was not designed to accept.

Instrumentatio n bit:: An optional status word bit, always set to logic O.

Intermessage gap: A gap of at least 4 lIs that must always exist betwee n messages.

Invalid command: A word which does not begin with a va lid sync fie ld, but with an
invalid Manches ter II code or an even parity.

Message erro r bit:: A bit in the status word , used by the remote terminal to indicate
that somet hing was wrong with the message it just received from the bus controller.

Mode contro l commands : (Mode code comma nds or mode commands): a series of
commands defined by MIL- STD-1 553 to aid in the management of the data bus and
the electrical control of the RTs.

Odd parity: The sum of the preceding 16 bits plus the parity bit must be odd.

Parity bit:: An extra bit that is always odd, according to the logic of the syste m.

Polling : A communication control method whereby a computer asks many devices


whether they have information to send .

Protoco l: The relationship of how the three types of MIL-STD - 1553 words are used
to transfer data between terminals .

Protoco l error: An error where the incoming comma nd and data are electrically
correct but the message is illegal by the protoco l established by MIL-STD -1553.

Remote terminal: An avionic unit designed to transfer data between an aircraft


subsystem and the MIL-STD-1553 data bus.

Remote termi nal response time : The 4 !IS to 12 us during which a remote terminal
must respond.

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Digital Techniq ues
Preliminary Module 5
Data Buses
Notes 5.4 5.4 .2 - HO - 17

Service request bit:: A bit provided to indicate to the active bus contro ller that the
remote te rminal is request ing service .

Standard interface: A unit deve loped for one aircraft , which can be used on another
aircraft with little or no modification.

Status word : A word transmitted only by a remote terminal to the bus controller.
This word gives information regarding the general status of the remote terminal itself.
The status word indicates whether any error conditions were detected in the
command or data words just received by the remote termi nal.

Sub-address: A function or an area within the RT to which a command is being


directed .

Subsystem flag bit:: An optional status word bit used by a remote termi nal to alert
the bus controller that a fault is in the subsystem . It also tells the BC that the data
being tra nsmitted may be invalid .

Sync character: Part of the MlL- STD-1 553 word struct ure. This com mand or data
character is always transmitted first.

Terminal flag bit: a bit which indicates the existence of a fault in the remote terminal.

Time-d ivision multiplexing: The transm ission of information between several


avionic units on an aircraft via a single cable, with communications between different
units taking place at different moments in time.

Transmit/receive (T/R) bit:: A bit which indicates if the RT is to transmit or to receive


data.

Word count/mode code field: A field in the com mand word that specifies either the
mode command or the number of words , wtiich are to be exchanged with the bus
controlle r.

5.4.2.5 Avionics Standard Com munications Bus

The HONEYWELL Avionics Standard Comm unications Bus (ASCB) is based on the
same principles like the MIL-STD -1 553 bus. But it is more efficient in terms of
o speed of data transfer
o amou nt of data
o maximum possible number of RTs.

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Digita l Techniques
Preliminary Module 5
Data Buses
Notes 5.4 5.4 .2 - HO - 18

High-speed Tx
bus
Rx

Tx f--- Low-speed bus


Tx
. I I I
Rx - Rx Rx Rx

Low-speed bus
Tx
I~ I
I

Rx 1< Rx Rx

Transmitter Receiver

r
To receiver

Figure 1 Typical ARINC 429 Bus Construction

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 19

Guidelines for label assignments


Two
most
signifi cant Least significant digit
digits
I I I I I I I
,. 0_ I 1 I 2 I 3 I 4 I 5 I 6 I 7
I I I I I I
00 I I I I I I
I I I I I I
01 I I
I I I I I
02 I I I I I I
03 I I I BCD: I I I
04 I I I I I I I
05 I I I I I I I
06 I I I I I I I
I I .... I I I
07 I I I I I I
10 I I I BNR: I I I
11

~
I I I I I
12 I I I I I
13 I I I I I
14 I I I I Discrete
I I I I
15 I I
--- 1.:---- +--- Main disc I M data
16 Main Data I I I BCD I I
17 I I I I I I
BCD I I
20 I I I I I
21 I I I I I I I
I I I I I I
22 r
23
I

BCD
I I
'" I I

24 I I I BNR I I( I I
25 I I I I I I I
26 I I I I I Test I
27 Discrete I Test
30 Aoolication deoendent
31 - I I I I I
II
I I
32 I I I BNR I I I I
33 I I I I I I I
34 I I I I I I I
35 Maintenance Data Ack 1M 180 I 1805
36 I, ~ -
I I I I I I
37 I I I BNR I I I I EQID

Figure 2 Label Assignments

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@
z"'C
=i
(J)
:;- I~I a)Example of a binary (BNR) data word
.. ~
o... CD~
CD =:
~ tn 3
:>
~
c)"
~
;-
;;l 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 ,5 4 3 2 1 _.
:>
~ ::::J
~~ D)
~
-; 1:t
P SSM MSB Data field LSB SDI LSB Label MSB ~

Q1. <,
to<
:> ~
:::; • ..:...
S'
~.
:;;.
1 1 1 a a a 1 a 1 a a a 1 a 1 a a a alp p p '0 a 01010011
R<>
~
-;:: Label- = Ground speed (312)
0 -s
::+ i:'S
;:;. Data = 650 knots
G>
3
0- P = pad
;I b) Example of a binary-coded decimal (BCD) data word
~
g.
~
:T
en 32 31 30 292827 26252423 222120 19 18171615 14131211 10 9 8 7 6 5 4 321
rofh MSB Data field LSB o
Ole.
CD
:<CD P SSM SDI LSB Label MSB ~ c
421 842 1 8 4 2 1 8.4 2 1 8 4 2 1
?- , CD
a a a 101 a 1 1 a a 1 a 1 j P P P P P P P P aa 00011010 oi

Label = True airspeed (230)


Data = 565 knots
01
Q P = pad
ii1 c) Generalized BCD data worn with discrete data
S'
S'
~
~- :l>
0 m
:::l ::Il 32 31 30 2928 27b6 25 2423 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 654 321 o
g 0
cO'
2:
:::l
<0
oCD
!!!
c:
I:
:::l
P SSM MSB..- BCD data ... Pad ~ Discrete LSB SDI Label ....
~
Ol
.
~
i\)O-=-l
;:::+
-OJ
I
~ '" If I OJ <D
-0
:D IOJ~
CD
~ a OJ ~.
0 5i-g
0
<0
Figure 3 Examples of ARINC 429 Data Words I\)
o
I

<D
(J)
<D
(J)

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Digital Techniques
Preliminary Module 5
Data Buses
Notes 5.4 5.4 .2 - HO - 21

For BCD data


P SSM Data field SOl Label/address
Bit No ~32 31130291281271261251241231221212011 911811711 611511411 3112 11 10 19 81716 151431211 1
I

'. , BCD nU'!1eric word AIM File transfer


r I
o 0 Plus, north, east, Intermediate word Intermediate word
right, to, above plus, north etc .

a 1 No computed data:NCD)
Initial word Initial word

1 0 Function al test I' Final word Final word
1 1 Minus, south. west , Control word Intermediate word
left, from, below minus, south, etc.
~

For BNR data

P SSM I Data field SOl Label/address


Bit No ~ 32 31 130 29 281271261251241231221211201191181171161.15114113112111 10 19 817 16 15 14 13 12 11 1
LSB

Sign bit

0 Plus, north, east, right, to, above


1 Minus, south, west, left, from, below

Status matrix
Priority
0 0 Failure warn ing 1
a 1 No computed data 2
1 0 Functional test 3
~
1 1 Normal operation 4 ~
ell

Figure 4 ARINC 429 Sign Status Matrix

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4.2 - HO - 22

6869B

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LOOLO LOOLO
+ I + I

« en
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c c
:.:J :.:J

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 23

> >
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(f)

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Digital Tech niqu es
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 24

If 1669 8 d

1 I
I
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I I
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I I I o

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Digita l Techniques
Preliminary Module 5
Data Buses
Notes 5.4 5.4 .2 - HO - 25

a) Direct-coupled bus r-------,

Data bus ~ Bus cable


wire pair
-----'-~-r__T---...--_t_-;-~_r_-
r-- shield

T
Stub of
:~ Shield
specified length

~ .------+----+-------,

Terminal
b) Transformer-coupled bus
r-------,
'"' I I
I I
Data bus ~ Bus cable
wire pair
I
I
-----'-~-r___r---...--_t_--r--~_r_-
I
I r-- shield

K
I
I
Shield
Isolation resistors
I
I
I
I
_.J

Stub of
specified leng~
T )

,...------+---+-------,

Isolation
r-v-v-",",", transformer

Transmitter/receiver
Terminal

Figure 8 Data Bus Coupling

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 26

C669 B

<t:: <t::
Q) Q)
c c
::J ::J

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 27

P669B
o
C\J
..... 0-

-
0>
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+ -'

co c
..... ::Ja>
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8~
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 28

Broadcast
T/R Mode Associated
Function Command
Bit Code Data Word
Allowed
1 00000 Dynamic bus control None No
1 00001 Synchronize None Yes
1 00010 Transmit status None No
1 00011 Initiate self test None Yes
1 00100 Transmitter shutdown None Yes
1 00101 Override transmitter shutdown None Yes
1 00110 Inhibit terminal flag bit None Yes
1 00111 Override inhibit terminal flag bit None Yes
1 01000 Reset remote terminal None Yes
1 01001 (reserved) None No
to
1 01111 (reserved) None No
1 10000 Transmit vector word Yes No
0 10001 Synchronize Yes Yes
1 10010 Transmit last command Yes No
1 10011 Transmit built-in test word Yes No
0 10100 Selected transmitter shutdown Yes Yes
Override selected transmitter shut-
0 10101 Yes Yes
down
1orO 10110 (reserved) Yes Yes
to
~
1 or 0 11111 (reserved) Yes Yes ;;;
e:

Figure 11 Mode Commands of MIL-STD-15538

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@
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5' ~ e n u: ~
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Figure 12 MIL-STD-1553 Remote Terminal Status Word I\)<D <D
<ow w
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 30

9669 B
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 31

L/5/598 CI)
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 32

r---, 86698
I "0 C
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 33

r - - -, 555 98
1 "0 I
C
1X co I
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(1)

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...... "0
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~ E
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I- U

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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 34

OOOL B
r--'
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I Q) E I
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({ C/) Q) :J I
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 35

"C
~

0
r - - , I OOL fJ
3:
1 -0 e I
1x ro I
1 a> E 1
12 E 1
...mm
1 81
L _ _ .J
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C
::::s
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ro
0> a>
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3=
ro ...... "C
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CX)
0
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~

::::s
C)
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 36

r - - , eOO1. B
I -0 e
I x co I
I
-
"'C
0
3=
ca
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co-o
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Digital Techniques
Preliminary Module 5 Data Buses
Notes 5.4 5.4 .2 - HO - 37

"C
~

r--, COO1.8
0
1 -0 e 1 ~
1x ro 1
1 Q) E 1
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ro-o
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ro 0 CJ
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Q) e 0
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@
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=i
(J)
:;- I~I o... CD~
CD =:
~
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;-
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~1
-;
iil
r- -:----, to<
~

5' ~ BC- to-RT(S) Transm it Data Data Data I ......Next I


5'
~.
~.

R<>
transfer command word word
*** word
#
Icommand
L .JI

r-----'
~I **
I
*.** [;D
0
::+ ~ RT- to-RT(S) Transmit Receive I Status Data Data # I Next I
G>
3
0-
;I
;:;.
transfer comma nd command word word word Lcommand J
~ r-----'
.c' Mode command Receive I Next I
#
~
:T
en I witho ut data word com mand IL comrnand-l
"-- .J
o
rofh
CD Ole.
:<CD r,-----, ~ c
?- I Mode command Transmit Data I Next I CD
#
with data word comma nd word "=" IL command .JI co~" oi

Q # Intermessage gap
~.
2. ** Respo nse time
:> »
s,
~-
o
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g
»
m
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0
*** Continuous data
o
cO'
~: ~ Ol
.
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gJ '"
i\) O -=-l
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~
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CD
~ a OJ ~ .
o 5i.g
o<0 Figure 21 Broadcast Message Transfer Formats co
CD
I

<D
(J)
<D
(J)

For Training Purposes Only Page89


Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5 .1 - HO - 1

5.5 Logic Circuits

5.5.1 Combinational Logic Circuits

5.5. 1.1 Introduction

W heneve r a logic circuit is clea rly defined by its tr uth tab le to give a fixed invariant
relationship between input and output, the circuit is referred to as a 'combinational
circuit'. The combinational circ uit contains no memory or feedback paths and always
operates in accordance wit h its truth table.

W heneve r a logic circuit cannot be clea rly defi ned by its truth tab le but instead
requ ires the entry of a binary va riable for one or more of its output conditions,
the circuit is referred to as a 'sequential circu it'.

The sequential circuit possesses a memory as the res ult of feedback paths , and may
operate differently for a give n input condition depending on the prior input sequence
app lied to the circuit. An example of the sequential circuit is a logic circ uit composed
of flip flops (FF) .

Note: This Lesson does not include the description of sequential circuits .

5.5.1.2 Basic Log ic Gates

Eleme ntary logic functions can be demonstrated with simple switch circuits but are
prima rily constructed wit h transistor electronic circuits . Symbols of logic gates show
a specific gate logic function but do not specify the exact circuitry. The conventions
relate to specific shapes that are to be associated with logic functions when drawing
logic circ uit diagrams .

Various sy mbo ls are still in use to rep resent logic circu its. The most important symbolic
language, however, is the lEG (i nternational Electrotechnical Qo mmission) convention
which shows the relationship of eac h input of a digital logic circuit to each outp ut
withou t show ing the inte rna l logic.

The three elementary logic gates are


o A ND
o OR
o NOT.

Eac h gate has its own schematic sy mbo l.

AND Gate

The most common AND symbols are shown in Figure 1. The inputs are labelled
alphabetically A, B, G ... and the output is labelled Q.

The lEG sy mbol (deta il a)) is identified by the sign '&' which sta nds for the
AND fu nction. The lEG symbol is common ly used, the other sy mbo ls (detail b)) may
be used in older publications or in American publications.

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Log ic Circuits
Notes 5.5 (a) 5.5.1 - HO - 2

The simplest AND gate consists of


o two inputs , A and B
o one output , Q .

A and B are called 'binary logic variables' because they have only one of two states at
anyone time. The two logic states are '0' and '1'.

Binary va riables can be emp loyed to represent the input cond itions or the resu ltant
output decis ions. The tru th tab le (detail a)) is generalized and represents any AND
aecision invo lving two input variables . The fu nctional relatio nship between inputs
A and B and the output Q of an AND gate is defi ned as

Q = A· B

where the sy mbol ' . ' means AND rather than multiplication. The state ment is read :

Q equals A and B.

The main feat ure of an AND gate is that the output logic state is
o '1' only when all of the inputs are at logic '1'
o '0' when anyone (or more) of the inputs is at logic '0' .

OR Gate

The most com mon OR sy mbo ls are show n in Figure 2 . The des ignations of the
input and the output are similar to t hose of the A ND gate . Th e lEG sy mbo l (detai l a))
is identified by , ~ l ' which means greater tha n or equal to 1 and describes the
OR function. The simples t OR gate consists of
o two inputs, A and B
o one output, Q .

The truth tab le (deta il a)) is generalized and stan ds fo r any OR decis ion involving two
input va riables .

The main feat ure of the OR gate is that the output logic state is '1' whenever any of
its inputs is at logic '1'.

The fu nctio nal relationship between outp ut Q and inputs A and B is defined as

Q=A+B

where the sy mbo l '+' means OR rather th an add ition. The statement is read:

Q equals A or B.

A compa rison of the truth tables for the A ND gate and the OR gate shows that the
output of the A ND gate is '1' for only one combi nation of inputs . The OR gate , on the
other hand , has a logic '1' outp ut for th ree combinations of inputs. Other sy mbols
(detai l b)) may be used in older pub lications or in Ame rican publicat ions.

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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 3

NOT Gate

The most com mon NOT symbo ls, also called INVERT symbols , are shown in Figure 3.
The lEG symbol (detail a)) is identified by '1' and the small circle at the output of this
symbol is used for denoting inversio n of the input.

The NOT gate is a logic gate that has


o only one input
m one output.

The main featu re of a NOT gate is that


o the output logic state is '1' when the input is at logic '0'
o the output logic state is '0' when the input is at logic '1'.

THus the output of the NOT gate is always the inverse or the complement of its input.
The NOT gate is therefore often called an inverter. The functio nal relationship between
input A and output Q is defined as

where the bar symbol (l means NOT. The stateme nt Q = A is read:

Q equals 'not A'.

The truth table (detail a)) summarizes the properties of the NOT gate. Since there is
only one variab le input, there are only 2 1 = 2 possib le truth values for A.

Hence the inverte r truth table has only two rows. Other symbo ls (detail b)) may be used
in older publications or in American publications.

5.5.1.3 Combi ned Log ic Gates

Besides the three elementary types of gate seve ral combi nations of logic functions
are so frequently used that special symbo ls have been adopted for them , such as
o NAN D
o NOR
o EXOR .

NAND Gate

The most com mon NAND gate symbols are shown in Figure 4. The lEG symbo l
(detail a)) is composed of the AND sym bol, and the small circle at the output
indicates that the NAND gate is an inverted AND gate.

The NAND gate combines the function of the AND gate with the NOT gate function.
Placing an N in front of AND to produce NAND is a contraction of Not AND.
The minimum NAND gate has
o two inputs, A and B
o one output, Q .

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Log ic Circuits
Notes 5.5 (a) 5.5.1 - HO - 4

The main feat ure of a NAND gate is that the outp ut logic state is
o '1' when any or all inputs are at logic '0'
o '0' only when all inputs are at logic '1'.

This is just the inverse (comp leme nt) of the AND gate situation.

If eac h output of the NAN D gate truth table (detai l a)) were compleme nted (i.e.
change '1' to '0' and '0' to '1'), an AND gate truth tab le wou ld resu lt. The functional
relationship between input A and B and outp ut Q is defi ned as

Q = A · B.
he statement is read:

Q equals 'not A and B'.

Other sy mbols (detail b)) may be used in older publications or in A merican publications.

NOR Gate

The most com mon NOR gate sy mbo ls are show n in Figure 5. The IEC sy mbol
(detai l a)) is composed of the OR symbol, and the small circle at the outp ut indicates
that the NOR gate is an inverted OR gate.

The NOR gate combi nes the function of the OR gate wit h the NOT gate function.
Placing an N in front of OR to prod uce NOR is a contraction of Not OR . The minimum
NOR gate has
o two inputs, A and B
o one output , Q .

The main feat ure of the NOR gate is that the output logic state is
o '1' only when all inputs are '0'
o '0' when any input is '1'.

This is just the inverse of what happens with the OR gate. If each outp ut in the NOR
gate truth table (detai l a)) we re complemented , the OR gate wo uld resu lt.
The fu nctional relationship between outp ut Q and inputs A and B is defi ned as

This statement is read:

Q equals 'not A or B'.

Other sy mbols (detail b)) may be used in older publications or in American publications .

Exclusive OR Gate

The most com mon EXOR gate symbols are shown in Figure 6. The IEC symbol
(detai l a)) is identified by '= l ' which sta nds fo r the EXOR function.

The excl usive OR (EXOR) gate is a logic gate wit h


o just two inputs, A and B
o one output, Q .

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Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 5

The main feat ure of an EXOR gate is that the output logic state is
o '1' only when one of the inputs is '1'.
o '0' when both inputs are '0' or when both inputs are '1'.
The trut h tab le (detail a)) is identical to the ordinary OR gate, sometimes called the
inclusive OR gate , except for inputs A = B = 1.
The truth tab le also shows that the output of an EXOR gate is '1' only when an
odd number of inputs are '1'. When an even number of inputs are '1' or '0' its
output is '0'. Thus, an EXOR gate can be used as an odd -bit detector.
The symbol for the EXOR function is the OR symbo l with a circle around it.
The functional relationship between inputs A and B and the output 0 is defined as

0=A0 B
and is read:
o equals A exclusive or B.
Other symbols (detail b)) may be used in older publications or in American publications .
The exclusive OR can be represented by a connection of basic logic functions
(Figure 7, detail a)) but is not a basic logic function itse lf. The resulting logic function
can be found by conside ring each possible combi nation of input values, recording the
values of intermediate variab les in a truth table and deducing the final output.
The truth table (detail b)) is composed of the
o input variables A and B
o the intermediate va riables 0 1 and 02
o the final output variable O.
The first three gates with the inputs A and B, and the output 0 1 build up an OR gate
with two inverted inputs:
o 02 is the output of the second OR gate with A and B as inputs
o 01 and 02 are led to an AND gate and build up the resulting output O.

Un iversal NAND Gate

Refer to Figure 8.
The NAND gate can be used for creating anyone of the three basic functions
o AND
o OR
o NOT.
This capability of the NAND gate makes it a so-called universal gate since
any conceivable logic function can be made from a suitable interconnection of
NAND gates.

Un iversal NOR Gate

Refer to Fig u re 9.
The NOR gate can also be used for creating anyone of the three basic functio ns
o AND
o OR
o NOT.

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Preliminary Module 5
Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 6

This capability of the NOR gate also makes it a so-called universal gate since
any conceivable logic function can be made from a suitable interconnection of
NOR gates.

Gates with Multiple Inputs

With the exception of the NOT gate which has only one input, the exclusive gates
discussed so far have two inputs. But it is possible and sometimes desirable to have
gates with multiple inputs.

Refer to Figure 10.

A three- input AND, for instance, behaves in the same way as a two-i nput AND in
that an output of '1' is asserted only when all inputs are '1'.

However, the third input variab le doubles the number of possible input combinations
that must be accounted for in the truth table. Possible truth values of the output
depend on the number of input variab les:
o 1 input variable 21 2 possible truth values for Q
o 2 input var iables 22 = 4 possible truth values for Q
o 3 input variables 23 = 8 possible truth values for Q
o 4 input variables 24 16 possible truth values for Q
o N input variab les 2N = 2N possible truth values for Q .

OR and AND Gates in Cascade

OR Gates

If two gates are connected (Figure 11, detail a)), it is important to know the logic
value of output Q for all combinations of inputs A, B, C in these circuits. The output of
OR gate 1 will be at logic '1' if either of the inputs A or B are at logic '1'. The output of
gate 1 is connected as one of the inputs to OR gate 2 and thus the output of gate 2
will be at logic '1' whenever either A or B is at logic '1'.

As a logic '1' at input C also causes the output of gate 2 to become logic '1', the logic
equation for output Q is given by:

Q =A+B+C

which is exactly the output of a three-input OR gate. Th us by connecting two OR gates


in cascade , a three-input OR gate is created.

Detail b) shows the truth table of the OR gates in cascade .

This process can be continued and the output of gate 2 is fed to the input of another
OR gate. The combination of three OR gates, for example, forms an OR gate with
four inputs (Figure 12, detail a)). Alternatively, the gates may rather differently be
connected together to obtain the same result. The logic equation for output Q is
given by:

Q = A + B + C + D.

Detail b) shows the truth table of the four- input OR gate.

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Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 7

AND Gates

The circuit in Figure 13 is simi lar to the circ uit in Fig ure 11, except that AND gates
have been used th is ti me. It can be stated that the outpu t Q is give n by:

Q=A·B·C
which is the logic equation for a three- input A ND gate .

A th ree -input A ND gate (deta il a)) is fo rmed by con necti ng two AND gates in
cascade. In the truth table (detai l b)) it is evident that the output is only at logic '1'
when all inputs A, S, C are at logic '1'.

A fo ur - input AND gate (Figure 14, detail a)) may be obtained by feeding the output Q
to a further AND gate . Alternatively the gates may be connected together rather
diffe rent ly to obtain the sa me resu lt. The logic equation for outp ut Q is given by:

Q = A· B· C· D.
Detail b) shows the truth tab le of th e four- input A ND gate.

5.5.1.4 Advanced Logic Gate Circuits

Ge nerally, a comb inational logic circuit is a memoryless network of logic elements for
which there are a finite number of inputs and outputs . Typically, logic circuits with two ,
three or four inputs , and one output have been disc ussed. However, logic circ uits with
more inputs and outp uts are often enc ounte red.

A large combi national netw ork can be considered as being made up of a number of
smaller interconnected subnetworks. Thinki ng of a large network as the interaction
of many smaller networks often simplifies the understanding of the overall operation of
a logic circuit. In order to give an example of a more complex combinational network,
a decoder will be discussed in the followi ng section.

Seven-Segment Decoder

Many modern digital devices produce numerical resu lts as their output. Typically, the
nume rical resu lts appear on a visual disp lay as deci mal numbers. The act ual digital
circ uitry within one of these devices can prod uce output only in te rms of '1's and 'D's .

Refe r to Figure 15.

It is possible to create the impression of a decimal digit by a particu lar combinatio n of


vert ical and horizontal bars.

Although the resu lting image may not be as pleasi ng to the eye as a printed dec ima l
digit , it is suitable for an electronic construction in which each bar is independently
illuminated.

Thus , by 'turning on' the proper combination of vertical and horizontal bars , the
image of a decimal digit will be seen.

Since each seg me nt of the nume rical display can be independently illuminated, the
prob lem of generating a dec imal number has been changed to one of generating a
seven -digit binary num ber.

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Log ic Circuits
Notes 5.5 (a) 5.5.1 - HO - 8

The position of a digit in this binary number corresponds to the seg ment's state of
illumination. Th us, if the segment letters are related to digit position as

(a, b , c, d , e, f, g) (Q7 , Q6, Q5 , Q4, Q3 , Q2, Q1) ,

then Figure 16 will indicate the app rop riate seven -digit binary numbers . It is assumed
that '0' represents an 'off ' seg ment and '1' represents an 'on' seg me nt.

Although seven binary digits are required to represent deci ma l num bers in terms of
seven seg me nts, fewer binary digits are needed to represent simp ly ten different
numerical sy mbo ls. In particular wit h four binary digits , 2 4 = 16 combi nations of '1's
and 'O's are poss ible and this is more than adequate to encode ten dec ima l digits.

A decis ion must be made by the designer of a numerical outp ut digita l device.

In most cases it hap pens to be simp ler to process small binary numbers than large
ones. Consequently seven -segment decoders are ofte n used when it beco mes
necessary to produce a deci ma l digit outp ut.

Figure 17 relates the standard four-digit code fo r deci mal digits to the seven-digit
binary numbers req uired for a display device.

The encoding table shows that six of the sixtee n binary input codes are unassigned.

In orde r to realize this translation from fo ur digits to seven digits a multiple outp ut
comb inational logic circuit is needed as shown in Figure 18.

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Digital Techniques
Preliminary Module 5 Logic Ci rcuits
Notes 5.5 (a) 5.5 .1 - HO - 9

a) lEe symbol

A A B Q
B
Q 0 0 0
a 1 a Q =A.B
N
1 0 0
IEC standar d 1 1 1

Truth table

b) Other symbols in use

)
A
B

N D
Ge rman standard
Q
B

N I
American sta ndard
«
~
~
Q

Figure 1 AND Gate Symbols and Truth Table

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Digita l Techniques
Preliminary Module 5 Logic Ci rcuits
Notes 5.5 (a) 5.5.1 - HO - 10

a) IEC symbol

A B Q

0 0 0

0 1 1 Q =A +B

1 0 1

1 1 1

Truth tab le

b) Other symbols in use

B ))
A A
B B
Q Q
N N "=
...~
'"
"=
Ge rma n sta nda rd Ame rican standard

Figure 2 OR Gate Symbols and Truth Table

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Digita l Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5 .1 - HO - 11

a) lEe symbol

A 0

A )----- 0 0 1

1 0

IEC standard Truth table

b) Other symbols in use

A ------l[)1---- 0 A-~ )---0

Ge rman standard American standard

Figure 3 NOT Gate Symbols and Truth Table

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Digital Techniques
Preliminary Module 5 Logic Ci rcuits
Notes 5.5 (a) 5.5.1 - HO - 12

a) lEe symbol

A & A B Q
B
b.....---- Q 0 0 1
0 1 1 Q =A.B
N
I
1 0 1
IEC standard
1 1 0

Truth table

b) Other symbols in use

[) [>
A A
B Q B Q

N N «
~
Ge rman standard Ame rican standard «

Figure 4 NAND Gate Symbols and Truth Table

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Preliminary Module 5 Logic Ci rcuits
Notes 5.5 (a) 5.5.1 - HO - 13

a) lEe symbol

A A B Q
B • . ,....,.}-----
'-' Q 0 0 1

0 1 0 Q =A +B
N I
1 0 0
IE<3 sta nda rd 1 1 0

Truth tab le

b) Other symbols in use

Cl ) :>
A A
B B
Q Q

N N «
~
«
Ge rman standard Ame rican standard

Figure 5 NOR Gate Symbols and Truth Table

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Digital Techniques
Preliminary Module 5 Logic Ci rcuits
Notes 5.5 (a) 5.5.1 - HO - 14

a) lEe symbol

A A B Q
=1
1----- Q 0 0 0

0 1 1 Q =A G) B
B
1 0 1
IEC sta ndard 1 1 0

Truth table

b) Other symbols in use

:=J)
A

B
E) Q
) Q

«
Ge rman standard American standard I;j
~
«

Figure 6 Exclusive OR Gate Symbols and Truth


Table
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Digital Techniques
Preliminary Module 5 Log ic Ci rcuits
Notes 5.5 (a) 5.5.1 - HO - 15

a) EXOR gate

~1 Q1

&
Q

B Q2

b) Truth table

A B Q1 Q2 Q

0 0 1 0 0

0 1 1 1 1

1 0 1 1 1
1 1 0 1 0

Figure 7 Equivalent Circuit of an Exclusive OR


Gate and Truth Table
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Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 16

&
--+ h
t'-'

& ~1
.......
t'-'
~

&
--+ .......
t'-'

Figure 8 NAND as Universal Gate

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Digital Techniq ues
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 17

~ 1

--+ h
t'-'

~1 ....... &
t'-'

~ 1

--+ .......
t'-'

Figure 9 NOR as Universal Gate

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Dig ital Tech niques
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Notes 5.5 (a) 5.5.1 - HO - 18

A B C 01
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0 AND
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1

A B C 02
0 0 0 1
0 0 1 1

~ -I ~Q2
0 1 0 1
0 1 1 1 NAND
& 1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 0
A B C 03
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1 OR
1 0 0 1
I 1 0 1 1
I. 1 1 0 1
1
1 1\ 1 1

A B C 04
0 0 0 1
0 0 1
1
o.

~ _I ~1 ~Q4
0 1 0 0
0 1 1 0 NOR
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0

Figure 10 Logical Functions of Three-Input


Gates
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Digital Techniques
Preliminary Module 5 Logic Ci rcuits
Notes 5.5 (a) 5.5.1 - HO - 19

a) Two connected OR gates

'A ~1

2
B
1
~ 1
Q
C

b) Truth table representing a three-input OR gate

A B C Q
0 0 0 0

0 q. Il 1 •1
,
0 1 0 . 1l
1'0 I
0 1 1
1 0 0 1
1 0 1 1
1 1 a 1
1 1 1 1

Figure 11 OR Gates in Cascade and Truth Table


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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 20

a) Four connected OR gates


1

A ~ 1
2
B

~1
3 Q

C • , ~ 1

D
.

b) Truth table representing a four -input OR gate

A B C D Q
0 ~ 0 0 0 0
~

0 '\'0 0 1 1
0 0 1 0 1
0 0 1 1 1
0 1
~
0
. 0
~

1.
.
0 1 oJ \~ 1
0 1 1 0 1 If
0 1 1 1 1 1\
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1

Figure 12 Four-Input OR Gate and Truth Table


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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 21

a) Two connected AND gates

A &

B
, 2
I

&
Q
C

b) Truth table representing a three-input AND gate

A B C Q
0 0 0 ,0 I....

• I-
0 0 1 0
0 1 0 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1

Figure 13 AND Gates in Cascade and Truth Table


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Digita l Techniques
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Notes 5.5 (a) 5.5.1 - HO - 22

a) Four connected AND gates


1

A &
2
B

&
Q
3

C • , &

D
.

b) Truth table representing a four-input AND gate

A B C D Q
• 0 0 0 0 0
\. 0 0 0 1 0
0 0 '1 0 0
0 0 1 1 0
~ ~

0 1 0 0 0
·0
.
0 ~( ~ . 1 0
1
0 1 1 0 0
0 1 1 1 \ 0
1 0 0 0 o I_
1 0 0 1 O.
1 0 1 0 o 1"-
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 1

Figure 14 Four-Input AND Gate and Truth Table


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Digita l Techniques
Preliminary Module 5 Logic Circ uits
Notes 5.5 (a) 5.5.1 - HO - 23

Decimal digit Appearance Segments on


a

fR:Yb I-I

e9c
" I~ 0 a,b,c,d,e,f
L/
/ b,c
r /
Seve n-segment display
2 1
- a,b,d,e,g
L
3 1 a,b,c,d,g
-I
, /

,
4 b,c,f,g
/
-

,,
5 a,c,d,f,g
- /
-
6 a,c,d,e,f,g
/
7
1 a,b,c
/
8
,I-I
/
I-I
a,b,c,d,e,f,g
II
::J
~
«
9 a,b,c,d,f,g
-I

Figure 15 Seven-Segment Display


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Digita l Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 24

. I~ )

Decimal Segments on Seven-digit


digit binary number


0 abcdef- 1111110
1 -bc---- 0110000
2 ab-de-g 1101101
3 abcd--g 1111001
4 -bc --fg 0110011
5 a-cd-fg 1011011
6 a -cdefg 1011111
7 abc---- 1110000
8 abcdefg 1 ~ 11111

9 abcd-fg 1111011
'"

Figure 16 Seven-Digit Binary Numbers


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Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5.1 - HO - 25

(Decimal Binary number Seven-digit binary number


digit
1
a b c d e f g
0 • 0 0 0 0 1 1 1 1 1 1 0
1 0, 0 0 1 0 1 1 0 0 0 0

2 0 0 1 1 0 1 1 0 1 1 0 1
• •
'0 ~ O
3 1 1 1 1 1 1 0 0 1
4 0 1 0
. 0 0 1 1 0 0 1 1
5 0 1
.~ ~
P
1
1
. 0
1 0 1 1 0 1 1
6 0 1 1 0 1 1 1 1 1
7 0 1 1 1 1 1 1 0 0 0 0
8 1 0 0 I 0 1 1 1 1 1 1 1
9 1 0 0 -1 "1 1 1 1 0 1 1
~

- 1 0 1 o . .' 0 0 0 0 0 0 0
I-
- 1 0 1 1 0 0 0 0 0 0 0
- 1 1 0 0 0 0 0 0 0 0 0
- 1 1 0 1 0 0 0 0 0 0 0

- 1 1 1 0 0 0 0 0 0 0 0
- 1 1 1 1 0 0 0 0 0 0 0
--

Figure 17 Seven-Segment Decoder


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Digital Techniq ues
Preliminary Module 5 Logic Circ uits
Notes 5.5 (a) 5.5.1 - HO - 26

I
I· &
~1
- a

I'
-rn I
~ .~...
~
~1
~. ... b

' '
(
=GJ-
....
- ~1
-... c
I

'I" , . ~1
-
~

I· d

I
8--
I
, ~ ~1
- e

--L:J I
I( .
,I r
~1
- f

--L:J I I
~ I
l--


\
,. r

.-
1-" :2= 1
-... g
A~ I & I o
~
;<:
B -... 1 '«

C ... l~~J
D - ~

Figure 18 Design of a Seven-Segment Decoder


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Digital Tec hniques
Preliminary Module 5
Logic Circuits
Notes 5.5 (a) 5.5 .2 - HO - 1

5.5.2 Logic Circuit Appl icatio ns in Aircraft Systems

5.5.2.1 Introduction

Many aircraft companies design and manufact ure aircraft systems , such as: flight
deck illuminated contro l panels, pillar lamps, lighting bridges , bezels and bearing
sca les to suit each aircraft or equipment require ment.

Refer to Figure 1.

Control panels and keyboards include push button sWitching systems, logic circuitry
and displays , integrated within the panel body. The contro l panels are designed
specifically to comply with civil, military and marine environmental standards.

Aircraft flight deck and equipmen t lighting are converted to NVG compatibility in
compliance with specification MIL - L - 85762 .

Some manufacturer utilize light source tec hnology from filament lamps , LEOs and
electroluminescent lamps to comply with
MIL - P - 7788F and aircraft manufacturers ' own spec ificatio ns.

Onboa rd passenge r information systems , LED illuminated door and taillights. cab
contro l panels, warning indicators complying with BRB/LUL RIA specifications.

Field Effect Transistor Digita l Logic Gates used in Jet Engine

Complex electro nics and sensors are increasingly being relied on to enhance the
capabilities and efficiency of modern jet aircraft.
Many of these electronics and senso rs monitor and control vital engine componen ts
and aerosurfaces that operate at high te mperatures.

However , since today 's silicon-based electron ics technology cannot function at high
tempe ratures, these electronics must reside in environmentally controlled areas .

This necessitates either the use of long wire runs betwee n sheltered elect ronics and
hot-area sensors and controls , or the fuel cooling of electronics and sensors located
in high- temperature areas.

Both of these low- temperature- electronics approac hes suffe r from serious draw-
backs in terms of increased weight, decreased fuel efficiency, and reduction of
aircraft reliability.

A family of high- temperature electro nics and sensors that could funct ion in hot areas
would enable substa ntial aircraft performance gains. Especially since, in the future,
some turbi ne-engine electronics may need to function at tempe ratures as high as
600 °C.

Refer to Figure 2.

600 °C NAND gate, consisting of two SiC (silicon carbide) JFET's (junction fie ld
effect tra nsistor) and a resistor. Signal input and output pads are labelled, along with
the VDD and VSS bonding pads that supp ly power to the circuit.

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Preliminary Module 5
Logic Circuits
Notes 5.5 (a) 5.5.2 - HO - 2

The high te mperature integrated electro nics and sensors (HTIES) program at the
NASA Lewis Research Cente r is currently developing silicon carbide (SiC) for use in
harsh conditions where silicon , the semiconductor used in nearly all of today 's
electronics, cannot function.

Refer to Figure 3.

The HTIES tea m recently fabricated and demonstrated the first semiconductor digita l
logic gates ever to function at 600 °C. The photomicrograph shows a NAND (not A
and not B) logic gate, cons isting of two junction field effect transistors (JFET's) and a
resistor fabricated in epitaxially grown SiC.

Figure 3 shows operational waveforms of the SiC NAND gate collected on a probing
station when the sample was heated to a glowing, red- hot 600 °C.

The input voltage waveforms are shown across the top , and the logic gate waveform
output voltage is shown on the bottom. On all the waveforms , a binary logic zero is
represe nted by a vo ltage of 0.25 V or less, whereas a vo ltage of 0.85 V or higher
corresponds to a binary logic one.

Whenever one of the inputs is a logic zero (0.25 V), the output of the logic gate is
greater than 0.9 V (a logic one) ; only when two logic ones are input does the logic
gate output drop to 0.2 V (a logic zero) , consistent with the NAND binary logic
function.

In addition to the NAND gates , NOT (not A) and NOR (not A or not B) gates on the
same SiC wafer demonstrated successful 600 °C operation.

Demonstration of simple logic functions at 600 °C represe nts a measurable step


forwa rd. Nevertheless, many further advancements are necessary before SiC
electronics will be ready for reliable long-term operat ion at extreme temperatures.

These necessary advance ments include increased circuit complexity, demonstration


of long-term operat ion, and development of higti -temperature electron ics packaging
and connecto rs.

Logic Circ uits and Aircraft Safety

To ensure aircraft safety, the EASA is proactively addressing the increasing


complexity of aircraft software and digital hardware .

Civil aircraft are becom ing more and more dependent on digital avionics and flight
control syste ms. This is due to new aircraft and avionics designs that incorporate
digital computers in syste ms that are flig ht critical.

If a flight critical syste m shou ld fail, it may result in the loss of the aircraft. For this
reason , the EASA is very conce rned about the safety of aircraft using this tech nology.

The softwa re and digital systems safety (SDSS) program addresses th is issue by
conducting researc h on constantly emerg ing complex software and advanced digital
hardware tech nology.

The data and results of the researc h are used to write policy and guidance for
certification of new aircraft and systems using th is tec hnology.

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Digital Tec hniques
Preliminary Module 5
Logic Circuits
Notes 5.5 (a) 5.5.2 - HO - 3

Currently, much of this advanced tech nology is not directly addressed in EASA
regulations . Th e desired outcome is increased aircraft safety. The SOSS progra m is
conduct ing researc h in the following areas.
o Complex Electronic Hardware
o Com mercial-Off-The- Shelf (COTS) Softwa re

Complex Electron ic Hardware

The SOSS program is currently addressing the safety and certification issues
conce rning highly complex avionics hardware that is being proposed for use in future
aircraft and avionics systems designs .

The project objective is to conduct a case study using the 00 -254 standard
developed by RTCA Special Comm ittee.

This standard provides guidance for design assurance and verificat ion of complex
electronic hardware such as:
o application specific integrated circuits (ASICs)
o erasable programmab le logic devices (EPLOs)
o fie ld program mable gate arrays (FPGAs) , etc .

These devices have millions of gates and are very difficu lt to fully test. To ensure
aircraft safety, the EASA is proactively address ing the increasing complexity of
aircraft software and digital hardware .

Commercial -Off- The - Shelf (COTS) Softwa re

The EASA is conduct ing a study to develop guidelines, verification methods , and
assessment and acceptance criteria for COTS software and hardware.

There is substantial concern in the aerospace industry for investigating whether


methods are available or could be found for determ ining the safety of COTS software
and hardware for use in airborne syste ms.

COTS software and hardware offer significant cost savings for aircraft manufactu rers.
There is the potential for increased aircraft safety if lower cost systems could be
shown to be safe and serve as a replacemen t for older, less capable systems .

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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5 .2 - HO - 4

"----~
'': ~.
. -:.
:-:. ~ . . ..

Figure 1 Control Panels with Logic Circuitry

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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5 .2 - HO - 5

put A npu

Figure 2 600 °C NAND Gate used in Jet Engine

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Digital Techniques
Preliminary Module 5 Logic Circuits
Notes 5.5 (a) 5.5 .2 - HO - 6

1.0
>
c:{
.....
:::J
0.5
0-
C
...........,..i .... ~
...
........ ...
0.0

> 1.0
af
.....
:::J
0-
0.5
C

0.0
1.5
>
~- 1.0
.....
:::J
0-
..... 0.5
:::J
0
0.0
-2 o 2 4 6 8 10
Time, ms

Figure 3 Operational Waveforms of a 600 °C


NAND Gate
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Digita l Techniques
Preliminary Module 5 Basic Computer Structu re
Notes 5.6. (a) 5.6 .1 - HO - 1

5.6 Basic Computer Str ucture

5.6. 1 Arrangement of Computers

A computer is a functional progra mmable unit that consists of one or more


assoc iated processi ng units and peripheral equipment.

It is controlled by internally sto red programs and can perform


o substan tial computatio n, including numerous arithmetic operations or
o logic operatio ns without human intervention.

A computer consists of many components which are designated hardware.


The hardware forms the physical base of a computer syste m and enables the
operation of the software.

Software is a group of compute r programs, procedures , rules and possibly assoc iated
documentation and data pertaining to the operation of a compute r syste m.

A program is a plan or a routine for solv ing a problem on a computer and it cons ists of
a seq uence of coded instructions suitable for data process ing by the compute r.
It interprets the information put in using an input unit and passes it on to the computer
for further exec ution of a task .

Process ing may include the use of


o an asse mbler
o an interpreter or
o a compiler

to prepare the progra m for exec ution as well as to execute it. Different types of
programs for solving different types of problems are used.

Two major types of software are


o operating systems and
o user programs.

5.6.1.1 General Arrangement of a Computer System

Refer to Figure 1.

A compute r generally consists of


o input and output units (periphera l equipment)
o central unit, containing
memory
control unit
arithmetic unit.

The input and output units provide communication betwee n the user and the
computer. Major input units are keyboard and mouse. Main output devices are
display, printer and plotter.

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Preliminary Module 5
Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 2

The control unit and the arithmetic unit are often combi ned to form the .Q.entral
,grocessi ng y nit (CPU). CPU and memory are often combined to form the central unit
or system unit. The CPU includes the electronic circuits controlling the interpretation
of instructions and their execution .

The control unit includes that part of the CPU which governs the operatio n of
instructions in proper seq uence, the interpretation of each instruction and the supply
of the proper data to the arithmetic unit and other units in accordance with this
interpretation.

The arithmetic unit contains the electronic circuits that perform arithmetic and logic
operations.

The memory forms that unit of the compute r in which data can be written (stored) and
from whic h the stored data can be selected for reading.

The memory can be divided into internal and external memory:


o Th e internal memory includes random- gccess- memory (RAM) units and
read- Qnly- memory (ROM) units; it can functionally be subdivided into pro-
gram memory and data memory.
o The external memory includes devices whic h use magnetic media, such as
diskettes (floppy discs), fixed discs and magnet ic tapes.

Information and instructions suitable for com munication , interpretation and proces -
sing by the computer are represented in a digital form . Within the computer equip-
ment, such data can be exte rnal or reside nt.

The smallest unit of digital data is the binary digit (bit), whic h is the unit of information,
that is represe nted by either '0' or '1'. A group of 8 adjace nt binary digits operated as a
unit of informat ion is known as a 'byte'.

5.6.1.2 System Unit

Refer to Figure 2.

The system unit contai ns the basic units of a computer system such as the CPU,
internal memory, seve ral controlle rs and I/O ports. All these units are interco nnected
for data transfer via a system of signal lines by designated buses .

The system unit uses three different types of buses , namely:


o Control bus (in the example - 6 bits)
o Data bus (in the example - 8 bits)
o Add ress bus (in the example - 16 bits) .

The control bus is a unidirectional bus, which transfe rs control data from the CPU to
the associated units in order to control and supervise the actions of the other units.

The address bus is also a unidirectio nal bus in the CPU . It determ ines from/to whic h
location internal and external data are to be transferred.

The data bus is a bidirectional bus. The task of the data bus is to transfer data from
one internal or external unit to the other.

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Digital Tec hniques
Preliminary Module 5
Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 3

The number of lines in a bus depends on the type of CPU and the address capability,
e.g.
o an 8-bit CPU needs 8 data lines
o a 16-bit CPU needs 16 data lines.

An address bus of 16 lines is capable of addressi ng a space of 2 16 bytes which


equals 64 kbytes.

Central Processing Unit (CPU)

The central processing unit (CPU) is the heart of the computer. The CPU is con-
nected to external units via the control bus, data bus and address bus. The buffers of
the address bus and the data bus connect the internal buses of the CPU to the
external buses.

Refer to Figure 3.

The CPU comprises in general:


o Arithmetic-logic unit (ALU)
o Interrupt control
o I/O control
o Instruction decoder
o Clock and sequence control
o Registers.

Arithmetic -Logic Unit (ALU)

Refer to Figure 4.

The arithmetic- logic unit (ALU) is capable of performing arithmetic and logical
operations. Within an 8-bit CPU the ALU is capable of processing 8 bits at a time.

The ALU includes two data inputs:


o A-operand
D B- operand.

The A-operand is connected via a data bus to the accumu lator and the B-operand is
connected to the data bus of the CPU. In this way the
o A-operand is identical with the content of the accumu lator.
Its variable has to be transferred to the accumulator.
D B- operand can directly be loaded with the content of any register, memory or
a constant selected program via softwa re instructions.

The two operands are combined via a combiner logic. This combiner logic is
controlled via the function select logic. The function select logic is controlled by the
program via the control bus.

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Preliminary Module 5
Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 4

The result of the operation , either logica l or arithmetic, is fed to the accumulator and
the flag register. The flags dependi ng on the result of the operation are always set,
while the accumulator stores the result. The content of the accu mulator changes with
o arithmetic operations like ADD and SUBTRACT
o logical operations , like AND and OR
o shift instructions.

The content of the accu mulator, however, does not change with compare instruc-
tions. Compare instructions only affect the flags of the flag register.

Arithmetic Operations

The ALU can perform the four basic arithmetic calculations:


o additio n
o subtraction
o multiplication
o division .

An electronic arithmetic- logic unit is only able to perform the addition. Therefore the
other three calcu lations must be derived and converted into additions.

Logical Operatio ns

The ALU is able to perform


o logical operations (AND/OR/EXOR)
o compare operations .

Such operations make it possible to combine or compare the magnitude of the two
data x and y what is required for decisions as
o selecting program branches
o using program jumps, so-called 'jumps on conditions '.

Such compa ring operations are for examp le:

x=y (x equals y)

x::::y (x greater than or equal to y)

x < y (x less than y).

This capability of comparing data and the resulting program contro l are a characteris-
tic of the flexibility of microprocessor syste ms. More or less complex electronic
switching circuits are necessary for the ALU to exec ute the mentioned operations .

Interrupt Control

Refer to Figure 3 again.

Input devices , such as keyboard and mouse, collect data from outside the computer.
These devices need the microprocessor to process the data they have collected ;
they need microprocessor service.

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Preliminary Module 5
Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 5

Input devices need a means to interrupt what the microprocessor is currently doing.
Therefore they are connected to the microprocesso r's interrupt lines.

When an input device wants to interrupt the microprocessor, it sets one of the
interrupt lines to high vo ltage. This is called 'interrupt request '. When an interrupt
occurs, the microprocessor
o completes the exec ution of the current machine language instructio n
o pushes the program counter to the stack
[] saves the contents of the registe rs on the stack
[2J writes a new address into the program counter.

The new address is called 'interrupt vecto r'. An interrupt vecto r is a fixed address that
depends on the interrupt line which is set. The microprocessor expects a subro utine
starting at this address . This subroutine is expected to instruct the microprocessor to
process the data the input device has collected . Such a subro utine is called 'interrupt
service subroutine'.

At the end of an interrupt service subroutine a return instruction is exec uted.


Once the microprocessor has fin ished running the interrupt it continues the former
running program from the point where it was interrupted .

The interrupt control controls the interrupt management of the CPU. When an
interrupt occurs the running program is interrupted and the line fI'\JTA is set to 0 as
interrupt request.

INTR , RST 5.5 to 7.5 and TRAP are interrupt inputs with different priority. T he input
with the lowest priority is INTR, the highest TRAP.

I/O Control

The CPU whose block diagram is shown in Figure 3 is provided with a serial input/out-
put (I/O) contro l device. SID is the §.eriallnput ,gata line, while SOD represents the
§.erial Qutput ,gata line. Both are connected to the data bus of the central system unit.

Instruction Decoder

When an instruction word is read into the instruction register via the internal data bus,
the instruction decode r recognizes whether the instruction is a single byte or a
multibyte instructio n. In case of multibyte instructions the subsequent bytes are stored
in the intermediate registers Wand Z. The instructio n decode r acts upon the clock and
seq uence control, making it pass on the logical fo llow-up pulses to the respective units
as necessary for a proper operatio n cycle .

Clock and Sequence Control

The clock and seq uence control sets the respective control line accord ing to the
instructions given by the instruction control. It is connecte d to
o the control bus of the central unit/syste m unit (e.g. FlU, WFf, 10 1M lines) and
o the internal control bus of the CPU.

The internal control bus of the CPU controls the actions of the registers , the bus
drivers , the ALU and the instruction decode r.

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Digital Tec hniques
Preliminary Module 5 Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 6

Registers

A register is a storage location inside the processo r. Registers in the contro l unit, for
example, are used to keep track of the overall status of the progra m that is running.
They store information, such as
o the current instructi on (instruction registe r)
o the location of the next instruction to be exec uted (program counter)
o the operands of the instruction.

Other registe rs may be used for


o arithmetic and logical operations
o sto rage of the results of these operat ions.

An important factor that affects the speed and performance of a process or is the size
and number of registe rs. Technically, the term 'word size' (or 'word length') describes
the size of an operand register, but is also used for describing the size of the buses to
and fro m the processor.

Currently, word sizes in computers range from 8 to 64 bits. If the operand registers of a
processo r are 32 bits wide, the processo r is said to be a 32-bit processor.

Special -Purpose Registers

Special -purpose registers are


o accu mulator (ace or A)
o flag register (F)
o intermediate registe rs Wand Z
o stack Rointer (SP)
o Qrogram Qounter (PC)
o increment/decrement address register.

The accumulator (accu or A) is especially used for arithmetic and logical operations .
The results of these operations are always stored in the accumu lator except for
compare results which are stored in the flag register. By the use of register pairs the
accu A is commonly combined with the flag register F to the register pair AF.

Input and output instructions can only be exec uted with the accu mulator. Add itional
direct address ing is only possible with the accumulator either as source or destination.

The f lag regi ster F sto res the results of arithmetic or logical operations and contai ns
flags, like parity flag , ze ro flag , carry flag and sign flag .

Th e intermedi ate registers Wand Z are used for the storage of operands . When an
instruction conta ining one or two opera nds occu rs these opera nds are stored in the
registers Wand Z.

The stack pointer SP contains the two bytes of the address of the stack. The stack
is used as intermediate storage of registers and addresses in the case of interrupts
or subroutines .

The program cou nter PC contains the address of the next instruction to be
executed by the CPU .

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Digital Tec hniques
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Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 7

The increment/decrement address register is used for driving the address buffers
connected to the address bus of the central unit/system unit. It receives the address
data from the data bus and is controlled by the clock and seq uence control. Address
increment and decrement can be done directly within this 16- bit register.

General -Purpose Registe rs

The general-purpose registers (operand registers) are availab le for arithmetic and
logical operations . The registers are connected to the ALU via the data bus.

Operat ions and data transfer between two registers , and register and accumulator
are very fast. For 16-bit operations two registe rs of 8 bits can be combined to a
register pair which can handle the 16 bits.

Example: The 8085 microprocessor contains 8-bit general-purpose registers designated


B, C, D, E, H and L. The 16-bit register pairs combined from them are BC, DE
and HL.

The registers are selected via the register select circuit under the control of the clock
and seq uence contro l unit.

Memory Devices

The CPU does not work without a program whic h is a sequence of instructions.
Therefore a medium for storing the progra m must be availab le. This medium is the
memory.

Integrated in the system unit are two different types of internal memories, RAM and
ROM , and the controller for an external memory - e.g. the disc cont roller.

RAM, the short form of ra ndom S!ccess memory, and ROM , short form of read Qnly
memory, belong to a special category of memory, named 'semiconductor memory'.

The other category is the external memory. This category generally includes
magnetic sto rage devices and will be described later.

Random Access Memory

The advantage of a random access memory (RAM) is that the contents of each
storage cell can be read or over- written.

Programs from external devices can be loaded into the RAM and then executed by
the CPU. The disadva ntage of a RAM is that the stored data of the RAM are lost
when the power is switched off.

RAMs are subdivided into


o static RAMs
o dynamic RAMs.

The static RAM contains bi-stable multivibrators (flip flops) as storage devices while
the dynamic RAM contains small capacitors storing the information in the form of
electric charge .

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Within the .dynamic RAM (DRAM) the information will have to be refreshed from time
to time because the micro- capacitors lose the charge even when the power supply is
switched on. Refresh ing is done by a special refresh- circuit integrated in the
computer syst em.

Read Only Memory (ROM) Devices

Another form of memory is the fixed memory where the compute r can only read the
memory, but is not able to change it. The following memories belong to th is type of
memory:
o ROM
G PROM
o EPROM
o EEPROM.

ROM is the abbreviation of r ead Qnly memory. This fixed storage unit can be
programmed only once, e.g. in the factory. ROMs are used for sto rage of system
software , interpreter software and/or encoder software.

A PROM, short form of p,rogrammable rea d Qnly memory, is similar to the ROM.
The progra m is not loaded by the produce r of the PROM but by the user by means of
a special progra mming unit. The PROM is programmab le only once at a time. When
the PROM has been progra mmed the data cannot be changed . The data are fixed.

EPROM is the short form of ~rasab le nrog rammable read Qnly memory. This memory
componen t is programmab le like a PROM . However, the contents of an EPROM is
erasable by UV light.

Therefore EPROMs have a glass window on top of the package by which the UV
light can erase the data. Once programmed , this window must be covered with a
piece of adhesive paper. For the erasing proced ure in a special unit the paper should
be removed.

An EEPROM , short for ~Iectrical grasable nrog rammable read Qnly memory, is similar to
an EPROM. The contents of the EEPROM , however, is not erased by UV light but with a
relatively high electrical vo ltage.

RAM and ROM are often integrated on the same printed circuit board as the CPU ,
and somet imes also integrated in the CPU itself. Another advantage of RAM and
ROM is that the data can be read/written from/to every memory cell in parallel.

The address of the memory cell is selected by the address on the address bus.
Then the data is read/written in parallel (8 to 32 bits at a time) from/to the memory cell.
In this way access time is very short, in the range of 7 ns to 350 ns depending on the
chip technology.

Interfaces

Refer to Figure 5.

An interface is the connection between two units, circuits, progra m modules


(software interface) , computers or external units. Via the interface , data and contro l
information can be transfe rred.

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The number of interfaces and the method of interfacing depend on the application
and the size of a computer syste m. A small computer might only require two to four
interfaces, while larger syste ms require more than a hundred interfaces.

There are various methods by whic h peripheral equipment may be connected via
interface units to the compute r. Interfaces are subdivided into two catego ries, namely
o parallel interfaces
o serial interfaces .

Parallellnte aces

Parallel interfaces enable parallel data transfer for sending and receiving data.
Paralle l means that all bits forming a data word are sent or received at the same
time.

For data transfer the interface uses as many parallel lines as bits are contained in a
data word (Figure 5, detail a)). Additional acknowledge (Ackn) lines, busy, grou nd
(GND), system clock (Clock) and auxiliary (Aux) lines are integrated in the interface.

A general-purpose parallel interface I/O data port common ly comprises 4,8 or


16 data lines. Typical parallel interfaces are the IEC bus and the CENTRONICS
interface.

The IEC bus is a standard interface employing eight data lines:


o five control lines and
o three acknowledge lines.

The IEEE488 is the American standard correspo nding to the European IEC bus.

The CENTRONICS interface is a standa rd interface developed by the printer


manufacturer CENTRONICS. As the IEC bus, the CENTRONICS interface uses
acknowledge signals for data transfer.

Serial Interfaces

A serial interface, as shown in detail b), transfers the bits of a data word bit after
bit by employing only one data line for transm itting data (TxD) and receiving data
(RxD). The TxD line of system 1 is connected to the RxD line of syste m 2 and
vice ve rsa.

The serial interface is used for long- distance data transfer. Serial interfaces are
subdivided into
o synchronous interfaces
o asynchronous interfaces .

Within the asynch ronous serial interface on serial tra nsmissions the bits of a data word
are transmitted one after the other on a single wire. The bits are not sent at a defined
speed in a special time period , but with start and stop bits. Therefore this interface is
called 'asynchronous'. This kind of interface allows to connect two devices using
different clock rates.

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Contrary to the asynchronous interface , the synchronous interface needs no start


and stop bits because the time interval of transmission is defined , the peripheral
must be in exact bit- synchronism with the computer. In order to provide exact
bit-synchronism the clock of either the peripheral or the computer is used for
bit-synchronism.

The two standa rds, RS232CN.24, relate to the connection of the data termi nal
equipment , such as peripheral devices , or of a computer to a data comm unication
equipment , e.g. a modem (modem is the short form of modulator/dem odulator).

RS232C is the designation of a serial interface acco rding to the American EIA
standard. The data transfer is asynchronous with
o one start bit and
o two stop bits.

The \1.24 interface is the European ve rsion of the RS232C interface.

5 .6 .1.3 Peripheral Components of a Co mputer System

As explained before a computer syste m consists of


o input/o utput units (I/O units)
o central processing unit (CPU)
o inte rnal memory units
o external memory units.

The central processing unit and the interna l memory unit form the system unit. I/O
units and external memory units are referred to as peripheral compo nents of the
computer system . Interface and controller circuits that are assigned to the syste m unit
provide interconnection betwee n system unit and peripheral devices. Peripheral
devices , such as diskette and fixed disc drive, can be installed in the same housing
as the syste m unit. The standard input and output devices , such as keyboard and
display, are mostly sta nd-alone units connected by cables to the system unit.

I/O Dev ices

Keyboard and display (monitor) are the standard I/O devices thro ugh which the user
comm unicates with the operating system , utility and application software and the
hardware itse lf. The mouse is another typical input unit, whereas printer and plotter
are typical output devices.

Keyboa rd

Refer to Fig ure 6.

The keyboard is the major device th rough which the user communicates with the
computer syst em.

Pressing a key on the keyboard generates an n-bit code that represents the character
assoc iated with the key. For ASC II represe ntation the code includes 7 bits.

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Figure 6 shows the layout of a typical alphan umerical keyboa rd. The numerical and
alphabetica l symbols are arranged in the same position as on the appropriate
typewri ter. On the right side of the keyboard a field with additional numerical keys is
located .
Additionally , the keyboard contai ns
o function keys and
o control keys .
The functio n keys can have different functions defined by a software program
designated keyboard driver.

Example: The function key F9 may have the function 'delete current line'.
The control keys are operated by simultaneously pressing a special key (e.g. CTRL)
and one or more other key (s) of the keyboard and thus generating control se-
quences .

Example: The combination of the keys 'CTRL' and 'C' interrupts a running program when
the MS-DOS operating system has been employed.

Mouse

By means of the mouse device , shown in Figure 7, detail a), a pointer presented on
the display can be shifted across the screen. The pointer is located on
o symbols
o windows
o menu windows
and with a click on the push-button the appropriate object is se lected. The selection
is shown on the display and can initiate
o a program
o a procedure or
o an instruction.
The mouse includes a roller ball which acts on two axes:
o one for the x-direction
o one for the y-direction (detail b)).
On each axis a slotted disc is connected . LEOs emit light beams which are sent
through the slots to photo resistors located on the other side of the slotted disc.

When forced by the movement of the mouse the disc is rotating , the light beam is
interrupted until the next slot has appea red. The photo resistors detect the
interruptions and conve rt them into data for the computer. Th e computer calculates a
new pointer (cursor) position within the defined range of the display acco rding to the
mouse movement.

Displays

The most important output device of a computer is the display. The display shows the
user the information immediately after it has been received from the computer or
entered via the keyboa rd.

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Display is the designation for any form of optical monitor. The most common display
types are
o TV-type monitor
o flat-panel displays (e.g. LCD) .

TV-Type Monitor

Refer to Figure 8.

Most Q.ersonal ~omp ute r (PC) syste ms and workstations employ a TV-type monitor.
This type of monitor is able to display alphan umerical characters as well as graphical
pictures.

For interface purposes the syste m unit of a computer includes a graphic board which
meets the sta ndard of the connected monitor.

Monitors are available as


o monochrome monitors
o colour monitors .

Both types employ ~athode r.ay l ubes (CRT) like a TV. The display picture is
generate d by an electro n beam which moves fro m the top left side to the bottom right
side within the display. While the beam is moving across the display it is switched on
and off acco rding to the data supplied by the computer.

In this way single picture points are generated which are designated 'pixel'. Pixel is
the short form of picture elements.

In order to generate characters, the electron beam starts at the left top corner of the
display and moves to the right top corner. When the beam has arrived at the right
side of the display it jumps back to the left side, again writing a new line one pixel
lower.

When the beam arrives at the right bottom corner a picture has been finished and the
beam will be reset to the left top corner in order to write the next picture. One picture
may be written in less than 20 milliseconds whic h equals more than 50 pictures per
secon d.

The human eye is not able to follow the quick movement of the beam and therefore
the picture seems to be fixed.

Each pixel displayed on the monitor equals one bit stored in the video buffer whic h is
part of the graphic board of the computer. The most common graphic boards use
more than 1 bit to define each pixel. When the bit equals 0, a white pixel is writte n
(beam on), and when the bit equals 1, a black pixel is written (beam off).

When using monochrome displays, more than one bit must be employed to contro l
the intensity of the beam and thus to realize different grey steps to be displayed .

When using colou r displays , more than one bit is used for defining the colours.
The colour display employs three basic colou rs:
o red (R)
o green (G)
o blue (B).

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By mixing these three colou rs for one pixel, each colour can be generated .

Video cards employing 8 bits per pixel can differ between 28 colours whic h equals
256 differe nt colours. A video card employing 16 bit per pixel can display 2 16 colours
whic h equals 65,536 different colours.

Flat-Panel Displays

The most com mon type of flat -panel display is the liq uid .Qrystal.d.isplay (LCD) -
a liquid-filled surface that, when electrically charged , creates images using ambient
light.

Because LCDs have very low power consu mption in compariso n with CRT displays,
they are the most cost-effective displays for portab le battery -powered computers.

Printers

The data, programs or results of the operated programs must be printed out to make
them permanently visible (outputs on monitors are only temporary).
Printers are connected to the syste m unit of the computer via
o controllers (hardware interface) and
o drivers (software interface).

Figure 9 gives an overview about different types of printer. The main distinction is
made between
o impact and
o non- impact printers.

Impact printers get their name from the method of creating characters on paper.
Like a typewriter, a striking mechanism transfers a whole or partial character by
striking a ribbon (the impact) that transfe rs the image onto the paper. Non -impact
printers, however, use nozzles, heat, electricity, magnetism or optical methods to
transfer an image on the paper instead of using an impact mechanis m.

Impact printers are


o teletypewriter
o matrix printer
o daisywheel printer.

Non- impact printers are


o ink-jet printer
o bubble- jet printer
o thermoprinter
o elect rosens itive printer
o laser printer.

Teletypewriter

Teletypewriter or TTYs provide both input and output for a computer system. There
must be circuits betwee n the keyboa rd and the computer I/O that convert the data
instructions into codes compatible with the computer circuits.

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The teletypewriter prints one character at a time similar to an electron ic typewriter.


The types are placed on a square block rather than on individual hammers.
The type moves from left to right, positioning the proper character to its print position .
A hammer strikes the character from behind and presses it with an inked ribbon on
the paper. The inked ribbon imprints the character on the paper. The typical
teletypewriter speed is about eight lines per minute or seven characters per second .

Matrix Printer

The matrix printer consists of pins in the print head placed in a matrix. The char-
acters are formed when the approp riate pins strike through a carbon band against
the paper. Th e pins are selected by pulses from a decode r.

The matrix of the print head may have different forms , for instance a 5 x 7 matrix or a
12 x 1 matrix. With the 5 x 7 matrix a complete character can be printed with one
stroke while a 12 x 1 matrix needs five to six strokes in ser ies to form a character.

Some matrix printers are capable of printing about 180 to 200 lines per minute or
300 characters per second .

Daisywh eel Printer

A daisywhee l printer contai ns a wheel , shown in Figure 10, detail b), with letters and
characte rs arranged on pins around the centre .

The daisywheel is turned to the correct position in order to print the proper characte r.
Once the whee l is in position, the hammer hits the pin of the wheel from behind
(detail a)). The pin touches the Raper through the carbo n band and prints the
character. Daisywheel printers are capable of printing 10 to 35 characters per
second .

Ink- Jet Printer

Ink-jet printers form characters or graphics with a print head containing tiny nozzles
or jets that spray drops of ink onto the paper. The effect is similar to dot-matrix
printing.

An ink- jet printer is capable of printing colour images. By using a separate nozzle
and ink cartridge for each of the subtract ive primary colours (magenta, cyan = dark
blue, and ye llow) plus a fourth one for black many different hues can be printed.

The advantage of an ink- jet printer is that it is nearly noiseless and highly reliable.

Bubble-Jet Printer

A va riation of the ink-jet printer is called 'bubble- jet printer '. With bubble-jet
tec hnology, the printing element is a computer chip with miniature openings , each
with its own heating elements.

By heating the ink and forci ng it through the opening, a small bubble is created.
The bubble makes a more precise mark on the paper with less scattering of ink
droplets than a conventional ink-jet printer. The result is a sharper picture.

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Thermoprinter and Electrosensitive Printer

These printers are also similar to the matrix printe r, but the pins burn spots onto the
paper by means of heat or electricity. These techniques are not in general use
because spec ial heat- sensitive paper is required and no copies can be made.

Laser Printer

The latest development in printer tec hniques is the laser printer. A laser beam is
modulated by the electrica l signals of a character generator. The beams form
characters of high accu racy and speed on a light-sensitive roll.

Black toner is applied to the light-sensitive roll and sticks to the places where the
characters shall occur. Then a piece of paper is pressed around the roll and the tone r
now is transferred from the roll to the paper, th us producing the characters on the
paper.

The print speed varies betwee n


o five pages per minute as regards low-speed laser printers and
o approxi mately 20 pages per minute as regards high-speed laser printers .
Also colou r laser printers are available.

Plotte r

The graphical representation is a means of communication much more adapted to


human senses than the represe ntation by numbers.
An increasing effort is therefore undertaken to make compute r-delivered numerical
results visible as curves , graphs or pictures by means of adequate output units.
Plotters belong to this category. They work on the base of moving coordinates .
There are two types of plotters:
o flat-base plotters , as shown in Figure 11, detail a)
o drum plotters , as shown in detail b).

With the first group of plotters the paper on which the curve shall be plotted is fixed
on a desk. The ordinate bar, driven by a spindle, moves in the direction of the x-axis.
The bar is equipped with a carriage to which the drawing pen is attached and which
executes the y- movements.

With the seco nd group the x- movements are achieved by the rotating cylinder, and
the y- movements by moving the drawing pen in vertical direction.
Paper, metal foi l or glass plates can be used for drawing the curves , depending on
the necessities and the type of equipment. The pen may be an ink pen or an
engraving too l. Line thickness and colour are selectable.

External Memory Devices

In order to expan d the available memory space external memory devices are used
for computer systems. External memory devices common ly employ the electro mag-
netic principle of storing data. In contrast to RAM and ROM devices the data are
stored in a serial form.

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The advantages of this principle are:


o Data are not lost when the power has been switched off.
o Available memory space is very large (in the range of some 10 Mbytes to
seve ral Gbytes) .

The disadvantage of this principle is that the access time is relatively long (fast
devices - approximate ly 12 milliseconds) compared with the access time of RAM and
ROM (fast RAM devices - approx imately 60 nanoseco nds).

External memory devices are:


o diskette (floppy disc) drives
o fixed disc (Winchester disc) drives
o magnetic tape (streamer) drives
o CD ROM drives
o DVD ROM drives
o memory cards.

Floppy Disc

Refer to Figure 12.

The floppy disc device consists of a floppy disc drive and the memory medium,
the diskette.

The floppy disc device is the most common ly used magnetic memory device for
microprocessor-based systems . The floppy disc is often referred to as a diskette ; it is
a removable magnetic memory medium which is permanently contained in a paper or
plastic envelope to protect the disc against touching, dust or dirt.

The floppy drive is a low-cost peripheral memo ~ that performs the electromechani -
cal read/w rite functions necessary to record and recover data on a diskette.

Figure 13 shows a typical floppy disc. The diskettes are available in different sizes,
the most popular sizes are 5 1/4 -inches (Figure 13, detail a)) and 3 1/2- inches
(detail b)). Detail c) shows a 5 1/4- inch disc drive.

Today more and more the 3 1/2 -inch floppy disc format is used within new computer
syste ms. Therefore some computers are fitted with two floppy drives, one employing
the 5 1/4- inch format, the other the 3 1/2 - inch format.

In the 3 1/2- inch version, the only opening, protected by a sliding metal panel, is
used for the read/write head of the floppy disc drive with which data are stored on the
disc or read from the disc. An opening for the drive motor is provided to let the
magnetic disc rotate at a continuous speed. A write protection notch prevents
undesired writing on the disc.

Depending on the memory capacity of the disc the diskettes are coded with two
letters:
o SD single density: low capacity
o DD double density: medium capacity
o HD high density: high capacity.

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Fixed (Wincheste r) Disc

Refer to Figure 14.

Fixed disc drives are similar to floppy disc drives. Th e arrange ment of data on both
discs is the same. Fixed discs can be stacked to increase the memory capacity.
With this arrange ment the read/write heads can access each point of the fixed disc
independent of the number of discs.

The advantages of a fixed disc syste m are:


o Rotation speed of the disc is much higher.
o Positioning of the read/write head is much more exactly.
[::J ReadLwrite speed is much higher.
o Data tra nsfer rate betwee n fixed disc and compute r is much higher.

Due to ttiese advantages the memory capacity of a fixed disc is much higher than the
memory capacity of a floppy disc. It varies betwee n some Mbytes and severa l
Gbytes .

The disadvantages of such a syste m are:


o The system must be Kept free from dust.
o It is much more difficult to change a fixed disc.

Magnetic Tape Recorder (Streamer)

Magnet ic tape recorders (streamers) are often used with microcomp uters as an external
memory device, mainly for back -up applications. Back - up is a procedure to copy data
from a fixed disc onto a tape to prevent the loss of data in the case of fai lure of the disc .
The tape recorders used for computers are similar to common music cassette recorders.

CD ROM

Read -only optical discs , called CD ROMs (.Qompact gisc r ead-Qnly memories) have a
function similar to ROM. Once writte n (burned) the information stored on the CD
ROM cannot be changed.

Note: Blank CDs which can be written once, are called CD ~ (compact gisc record-
able).

In contrast to the above principle the CD RW (£ompact gisc re~ritable) can be


erased more than 1000 times . Therefore it can be used as te mporary data storage,
because the sto red data can be updated.

The tech nology of the CD ROM is the same as used with the audio compact disc
(CD). The technology is of digital for m and based on a 4.72 - inches (12-cm) optica l
disc that stores up to 800 MB (90 minutes) on a single side .

The CD ROM can sto re audio, video and computer data as well , and a mixture of
these data. When compression techniques are used, the data contents of the
CD ROM extends beyond simple line drawi ngs and includes pictures, animation and
real-time video. E.g. with the use of media compression techniques a video of
60 minutes with a resolution of 480 x 640 dots can be stored on a 650 MB disc.

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The hardware necessary to burn a CD ROM is called a CD writer. CD writers operate


at different speeds , e.g. a 8/4/32-writer is able to burn a CD eight times faster,
rewrite a CD RW four times faster and can read a CD ROM 32 times faster than at
normal speed .

OVOBOM

The DVD (gigital y:ideo gisc or gigital y:ersatile gisc) essentially is a bigger, faster CD
that can hold video as well as audio and computer data.

The DVD has the capabi lity to sto re near -studio-quality video and better-than-CD -
audio quality. DVDs are available as DVD ROM, DVD R and DVD RW. Th e storage
capability ranges from 4.7 GB (single-side storage, one layer) up to 17 GB (dual-
side storage, two layers).

Memory Card

An alternative to rotating discs is the credit -card -sized memory card , also called
PC card. The cards are based on a chip techno logy called 'flash EEPROM (electri-
cally erasable programmable read- only memory) '. This type of chip is very useful in
applications that need a rewriteab le mediu m that does not require power to store the
data.

Like floppy discs , memory cards can store data and programs , are erasable and can
be exchanged among computers that have memory card slots . Memory cards have a
storage capacity of 20 to 60 MB.

Memory card technology is still at the beginning, but it is expected to replace discs in
portable computers in future. Most hand- held and notebook PCs, for example,
contain a memory card slot. The advantages include faster access , smaller size and
less power consu mption due to the lack of any moving parts. The major
disadvantage is the current high cost of the cards relative to discs.

5.6. 1.4 Air Data Computer

Introduction

Pitot and static pressure systems are specifically designed to measure these
pressu res in terms of airspeed , altitude and rate of altitude change. There are many
syste ms whose operation depends on this type of input.

The utilization of such syste ms (in terms of weight , size etc.) in an aircraft depends
on its size, weight and operational category.

In order to minimize the problems arising from the employment of va rious different
indicators and other syste ms including the necessary piping and wiring , the
pressu res are transmitted to a centralized £!ir gata !<omputer (ADC) unit.

This unit conve rts the data into electrical signals and transmits these via cables or
data busses to the depe ndent indicators and systems.

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Digital Tec hniques
Preliminary Module 5
Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 19

Another advantage of an ADC (when looking at the process ing of pressures only) is
that circuits may be integrated with their principal data modules in such a way that
correct ions for Qressure grror (PE) , barometric press ure changes and compressibi lity
effects can be automatica lly applied.

In addition, provision can also be made for the calculatio n of true airspeed by using
static air temperature data inputs. Following informatio n are typically provided by air
data systems :
m Barometric altitude (ALT)
o § tatic gir1emperature (SAT)
o Iotal gir tem perature (TAT)
o in dicated gir~peed (lAS)
o I rue gi r~peed (TAS)
o Mach indication.

Barometric Altitude Data

Refer to Figure 15.

Barometric altitude information is important to the pilot for a number of reasons .


The pilot must be sure that he is flying high enough to keep clear of the highest
terrain or obstacle along his intended route.

To reduce the possibility of a midair collision , the pilot must be sure that he is flying at
the correct cruising altitude. Sometimes he may want to fly at a specific altitude to
take advantage of prevai ling winds .

Determination of altitude from pressu re measurements is based upon a standa rd


atmosphere in whic h press ure, density and temperature are known functions of
altitude. The altitude resulting from this computation is called pressu re altitude.
It represe nts the altitude above sea level. All aircraft barometric altimeters are
calibrated to this standa rd.

The standa rd atmosp here approximates the average year-long conditio ns existi ng at
0
a latitude of 40 North. This equals a sea level press ure of 1,013.25 hPa
(29.92 inch Hg) at a temperature of 15 "C.

Due to the variation in atmospheric press ure from that of the standard atmosp here,
most baromet ric altimeters have a zero setting from 952 hPa (28.10 in Hg) to
1,050 hPa (31.00 in Hg). At times, when atmosp heric conditio ns are near standard,
the altitude indicated by the altimeter can be fairly accurate.

All other altitudes will be in error. Flight regulations require pilots flying below
18,000 feet to maintain a flig ht-level referenced barometric setting to the current
reported altimeter setting of a station within 100 nm of the aircraft.

At altitudes above 18,000 feet, the primary purpose of calibrated altitude informatio n
is to ensure air traffic separation between aircraft. For this purpose , atmosp heric
variations are not important, because each altimeter in the area will read the same if
it is set to the standard atmosphere. To ensure this separation , a universally
accepted standard altimeter of 1013.25 hpa (29.92 in Hg) is used above 18,000 feet.

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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 20

Temperature

Refer to Figure 15 again.

The Qutside .§ir temp erature (OAT) affects airc raft performance in several ways.
During take -off, it affects the amou nt of thrust available from the engines and the lift
due to air density. At cruise level, it affects the fuel consumption. So, the OAT is
required to compute the true airspee d (TAS).

In poor weather conditions, the stat ic air temperature (SAT) indicates the chance for
icing to occur, while the total air temperature (TAT) indicates the likelihood that icing
is occu rring and the need to de-ice or to change the flight level.

The measurement of temperature by a moving aircraft is usually accomp lished by


means of a platinum wire probe or a thermomete r projected into the airstream.

When the te mperature changes the platinum element changes its electrical resis-
tance. This change in resistance is converte d into an electrica l signal that is
proportional to the total air tempe rature.

Airspeed Data

The two main applications of airspeed data on modern jet aircraft are
o to define performance and structu ral limitations (e.g. limiting speed for flap or
gear operation)
o to assist navigation (e.g. an airspeed input to a long- range navigation syste m
is necessary to com pute the ground speed) .

Static Source Error and Correction

Refer to Figure 15 again.


Static pressure is the absolute pressure ot an undisturbed air mass. During flight, the
airflow passing the static port is different to the press ure in the static syste m with
undisturbed air.

At low speeds, this effect can be ignored. But at high speeds it is significant and has
to be corrected . In general terms, a pressure error (PE) is caused by anything whic h
causes a variation in the airflow as it passes the static port. Examples are:
o Airflow around the curved fuse lage
o Extended landing gear/flaps
o Changes of the angle of attack (AOA)
o Aircraft yawi ng motion.

These effects are either long or short term or both. The long term effects will cause
altimeter and airspeed errors in levelled flig ht, while the short term effects can cause
undue activity or even reversed operation of the ve rtical speed indicator.

The term ~tatic ~ource ~rror Qorrection (SSEC) refers to a correction whic h is long
term , measurable and repeatab le.

The correction is a function of the Mach number and is usually a compromise to


cover all altitudes and flight situations. Accord ing to official regulations , SSEC
accuracy shall reach 30 feet.

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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 21

Analog ue ADC

Refer to Figure 16.


Each module of an analogue ADC constitutes what is termed a 'servo mechanism'.
It is comprised of certain mechanical elements and synchros which perform the
various functions.
The output signals from each module are transmitted to the relevant indicators which
are of the servo-operated type . Interfaci ng is done by transduce rs.

Failure Warning

Each module of the ADC incorpo rates a warning logic circuit network which activates
a warning flag in the associated indicators in the event of loss of the respective data
signals. Annunciato r lights correspondi ng to each module are provided at the end
panel of the computer. They are also illuminated in the event of failures. Once a
warning circuit has been triggered it remains latched.

Indicators

The indicators that are used in conjunction with an analogue ADC also contain servo
mechanisms. When connected to the computer they each form a complete servo
loop with the respective modules of the computer. These indicators may, in some
applications , be of the combined pneumatic and servo type or they may be entirely
servo-operated.

Digital ADC

Refer to Figure 17.


A digital ADC processes the same basic parameters as an analog ue one. The major
difference is that all the signals correspo nding to the variab les measured are
converted and transmitted in digita l form .

The Pitot and static pressu re sensors are of the piezoelectric crystal type.
Their frequency-modulated signals are supplied to the altitude , computed airspee d
and Mach calculation circuit modules via a frequency-to -digital converter.
The analog ue inputs from the synchros of the angle of attack (AOA) sensors and the
altimeter barometric press ure setting contro ls are converted by means of synch ro-
to -digital conve rters.
Outp uts from all modules of the computer are supplied to a tra nsmitter connected to
data buses from which all interfac ing systems requiring air data are then supplied .
The purpose of the discrete coder module is to monitor signals relating to the status
and integrity of particular circuits, e.g. the heater circuits of air te mperatu re probes,
Pitot probes and AOA senso rs, and to initiate appropriate warnings.
In order for the computer automatically to take into accou nt the pressu re error of the
air data syste m of a particular type of aircraft (and also its sta ll characteristics) ,
the ADC is matched with the relevant data by programming the appropriate modules
accord ingly.

The indicators assoc iated with a digital ADC are of the pure servo -operated type .

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Digita l Techniques
Preliminary Module 5
Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 22

I - Arit hmetic unit


I
I I
I I
I I
I I
I I
I I
I Memory I
I I
Input Output
units I I units
I I
I Programs Data I
I I
I I I I
I I I I
I I I I I
I L_ _-.J I
I
IL

I
_ Contro l unit
--J--_J I «
I Ce~ral unit _
---.-~ ~

Figure 1 General Arrangement of a Computer


System

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Digita l Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 23

..... fIl
IDID
..c .~
- >
aID
"'0

.....
..... -
"'0
ID
roO
oz
.oc
0 =
file
>-0
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Dco
~ o

..
.-
..... - fIl
00_
~ '--s
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00 . -.....
0:::::
..::; 0 0

..... -
e
IDO
:t::::JC
z ~
.00
0
0
_ "'0
-C
ro
(f)
E_
IDID
-fIl fIl
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>- .....

::: ::: :::


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m
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(I)
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2
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co C\I
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aa::: I-
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.-
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fIl ::J
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~
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Page144
l!) io l!)

@ l!) (() r-...: 0...


z"'C
I~I
cr: o
=i
(J)
I~ o... CD~
z , z z z z z ,
:;-
Serial I/O CD =:
~ ~
I Interrupt contro l
I I contro l I tn 3 _.
n
:> ;-
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:;;" 11 I lt~ ~
~.
R<>
~
-;::
Accum ulator II Short tim e
register
I Flag register ~
Instruction
reg ister - ~-
.- .
~

'- I
_ I
rV1 ultiplexer
I
0
::+
G>
3
0-
-s
i:'S
;:;. L ~l
.- - -
Interm ediate
register W
Intermediate
reg iste r Z

Ace. interme- B - Reg iste r (8) C - Register(8)


::'~
;I
diate reg iste r
Arithme tic ~ -
~ logical unit OJ
en
g.
:T
en
rofh It- ~U

Instr uction
.dacoder
.
~
•• - ....
OJ
en
'6>
D - Register (8) E - Register(8)

H - Reg ister (8) L - Register (8) (]l


~
0
.me.
OJ
(ALU) a:
CD
c
:<CD
?- .. . . Stack pointer (SP) (16) "0)-
--CD
-
~ ~
Prog ram coun te r (PC) (16)
oi
Deci mal
adjust ~O
.
..
. -- Incr/Deer address register
(16

-
~

"';.
C lock and

•• X1
internal control bus
- ~
-
.- seq uence
control
intern al contro l bus
n ,r
II
~
;0
OJ
ffi
~
<:

• o'
~

X2 Reset
II
Powe r
supply ••. +5 V
O'V
Clock Control
~
Status DMA I Address bus
driver
Dat a/address
bus driver I
oo
3 cO'
0

II
oi -0

,~U:o ~l>. ~l ~~o U~3l II


;:::+
• .:l
.0> c_ OJ
-
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U " " U U " <i :...... ~ -=-l
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o~ I~ ~ 0_ 0 I -:::r
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cr: <i W W I I cr: rr Address bus Address/data bus a 2 ~.
I g...Q
Figure 3 Block Diagram of a CPU ro ~ ~
-Po CD (J)

For Training Purposes Only Page145


Digital Techniques
Preliminary Module 5 Basic Com puter Structure
Notes 5.6. (a) 5.6.1 - HO - 25

e 1559'<'

CIl
:::J
I' ..0
ctl
15
0
..., )7 ,,,"

Q) I ~
+-'
co~ "C
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I Q.. ctl:::J CO
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Q)~
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............
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----
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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 26

a) Parallel interface

00 00
01 01
02 02
03 03
04 04
05 05
06 . II 06
0 7. I'• ~ . 07
Ackn ~ Ackn
, ,
Busy ~
Busy
Clock Clock
I
Aux Aux
GNO I &
GNO

System 1 System 2

b) Serial interface

TxO TxO
RxO RxO
SO SO
II
GNO GNO
Clock Clock
}I

Syst em 1 Syst em 2

Figure 5 Interfaces

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Digita l Techniques
Preliminary Module 5 Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 27

Alphanumerical keys
Function and control k ys
Numerical keys

Figure 6 Example of a Computer Keyboard

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Digita l Techniques
Preliminary Module 5 Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 28

Figure 7 Example of a Mouse Device

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Digita l Techniques
Preliminary Module 5 Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 29

Figure 8 Example of a Computer Display

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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 30

Printer types

Impact Non-impact

- Teletypewriter - Ink-jet printer

- Matrix printer - Bubble-jet printer

- Typewheel printer - Thermo printer

- Electrosensitive
printer
Laser printer

Figure 9 Types of Printers


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Digita l Techniques
Preliminary Module 5 Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 31

a) Type bar Paper feeding


roller

Actuating
lever

7
Trigger
magnet
Print
drum

b) Type wheel ( - -- j
\ /'
\ ( /""
\ "'-, /'
/ )
I
I
I I
I \
I \
/ \
/ \
f -=r---=-~ ~~-~
I I
I I
I I
I I
I I
I I
I I
I I <xl
I I~
I I~
l _. __ J
-. -.
-.
""'"'"'- - - - - - - - ~

Figure 10 Daisywheel Printer Principle

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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 32

a) Flat-base plotter ....


r---
x
.
1 ..... -

5
2

yt 3 4

II

r- -

b) Drum plotter
I
...
'---

x
. 1 = Desk
x 2 = Ord inate -controlled bar
3 = Carr iage
6 4 = Pen
5 = Drawing paper
6 = Drum

Figure 11 Principles of Plotters


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Digita l Techniques
Preliminary Module 5 Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 33

Floppy disc drive

Diskette
(floppy disc)

Figure 12 Floppy Disc Device


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Digita l Techniques
Preliminary Module 5 Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 34

a) 5 1/4 - inch sheath


Write
0 -
1 - ~ protection
notch

Read/write
opening

b) 3 1/4 - inch sheath


Sliding metal panel

~
"" . ~

""0
,
~

Ii

c) 5 1/4 - inch disc drive

Read/w rite
head

Figure 13 Floppy Disc


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Digita l Techniques
Preliminary Module 5 Basic Computer Structu re
Notes 5.6. (a) 5.6.1 - HO - 35

Sector

,,
/
,,
,,
Rotating
disc stack v
Tracks

Figure 14 Hard Disc Drive


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Digital Techniques
Preliminary Module 5 Basic Computer Structure
Notes 5.6. (a) 5.6.1 - HO - 36

Ang le-of-
attack vane

Static ports

Pitot probe
Static probe
(both sides)

Figure 15 Air Data System Input Probes Location


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@
z"'C
=i
(J)
:;- I~I f OM-P-U-T E-R - - - - - - - - - - -1 --- -- - - - - - -,
o... CD~
CD =:
~ ~ tn 3 _.
:>
~
c)"
;-
;;l
~
I ,
0) ~Ac~ a ~ I ::::J
I o ~" d' i
:>
~ ~~ D)
-; 1:t ~
<, .-,------" to<
iil "
5' ~
:::; VERTICAL
5' :;;. SPEED I
~. MOD ULE ,,
R<>

o
~
-;::
-s
I,
::+
G>
~
....
3
0-
;I I
~
I I
p- - - - --- -- I

1'0 8_ _'J1
: I I
I
L _ _ +I I
~
:T
en
rofh P E CORRECTION (]l o
l_~_Y c.
NETWO RK
CD 0)

~
: - - - , I
c

r
a. ,
I
~ CD
oi
From Systems using air data inputs
TAT ~
probe SAT- H I Flight director Gust response
-'--'----~-::--

,--:== ==.:
I
I
-=
----Jo.
'>
Automatic flight control
Inertial navigation
Altitude reporting
Ground proximity warning
Electronic engine control
Cabin pressurisation
Electronic units of flight
control systems . e.g. flaps

. 1- -
TAS . . . . . .
TAS
I
I'
Flight management
Flight recorder
Stall warning
slats. stabiliser trim. yaw
damper
() OJ
I _- __..
L:=
MODUL E

' . I = P,
~
I.u
ffi
o'
~ PI
-- - -- P E correction
oo 0
3 cO'
oi -0 ;:::+
. C OJ
0>_-
• CD
..., roJ
(f)C)
I-:::r
a C)..Q
2 ~.
-c
Figure 16 Analogue Air Data Computer (Block Diagram) co ~ CD
-....J CD (J)

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Digital Tec hniques
Preliminary Module 5
Fib re Optics
Notes 5 .10 5 .10. 1 - HO - 1

5.10 Fibre Opt ics

Opt ic Data Transm ission

5.10 .1.1 Introduction

The latest type of communicatio n link uses a cable made of thin glass fibres that
serve as a conduit for light over long distances with little losses. In this syste m with a
fibre-optical link, the full cable-channel bandwidth can be used for amplitude
modulation of the light source.

The choice betwee n optical fibre and elect rical (or 'copper') transm ission for a
particular system is based on a numbe r of trade -offs. Optica l fibre is generally
chosen for systems with higher bandwidths , span ning longer dista nces, than
electrical cabling can provide. The main benefits of fibre are its exceptionally low
loss, allowing long distances betwee n amplifiers or repeaters; and its inherently high
data-carrying capacity, such that thousands of electrical links would be required to
replace a single high bandwidth fibre. One further benefit of fibre is that even when
run alongside each other for long distances, fib re cables experie nce effective ly no
crosstalk , in contrast to some types of electrical transmission lines.

In short distance and relatively low bandwidth applications, electrical transmission is


often preferred because of its advantages over glass fibre applications:
o lower material cost , when cabling is not required
o lower cost of transmitters and receive rs
o ease of splicing
o capabi lity to carry electrical power as well as signals.

Because of these benefits of electrica l transmissio n, optical comm unicatio n is not


common in short box-to-box, backplane , or chip -to-chip applications; however,
optica l systems on those scales have been demo nstrated in the laboratory.

In certain situations fibre may be used even for short distance or low bandwidth
applicatio ns, due to other important features:
o Immunity to electro magnetic interference, including nuclear electro magnetic
pulses (although fibre can be damaged by alpha and beta radiation)
o High electrical resistance, making it safe to use near high- voltage equipment
or betwee n areas with different earth potentials
o Low weight , important in aircraft
o No spa rks, important in flammable or explosive gas environments
o Not elect romagnet ically radiating, and difficu lt to tap without disrupting the
signal , important in high-security environments.

Refer to Figure 1.

For transmission , a modulated light beam is the source that introduces light into the
glass fibre cable. At the receiving end, a photoelect ric detector converts the va riation in
light amplitude back to electric signals. The light serves as a super carrier wave for the
entire cable passba nd.

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Fibre Opt ics
Notes 5.10 5.10.1 - HO - 2

Refract ion and Interna l Reflection of Light

The reason for the low attenuation is the internal reflection of light inside the fibre
cable. Thus, no light can escape , and the losses are extreme ly sma ll.
To analyse this effect , the basic laws of refraction of light are illustrated in Figure 2,
detail a), and internal reflection is shown in detail b).
Light rays are going from air into a slab of glass. The velocity of light is reduced
becaus e glass is a denser medium.
In detail a), light rays enter at an angle from the normal (perpendicu lar) line. This
directio n is perpendicular to the interface where the light enters or leaves the glass.
Going into a denser medium, the light rays do not continue their original angular
direction. Instead, they are bent to an angle close r to the normal line because of the
reduced ve locity of the rays .
As each wavefro nt of light reaches the air-glass interface, the effect is like a squad of
people side by side marching in a line. The first one to hit the interface begins going
slower, but the last continues at the original speed up to the interface . As a result, the
line of the wavefront turns to its right, and the light beam bends towards the normal
line.
At the bottom of the glass slab , the light leaves the glass and is bent away from the
normal line. This directio n is opposite to the bending of the incide nt light. The reason
is that the light enters a less dense medium that allows it to trave l with higher
velocity.
The bending of the light is called 'refraction'. How much the light bends when it meets
a differe nt medium is determined by the index of refraction , whose symbol is I] . Its
value is:

speed of light in vacu um


'1 = speed of light in mediu m

Typical values of '] are:


o 1 for air or vac uum
o 1.8 for glass
o 2.4 for diamond
o 1.3 for water.
Now it is considered that a light source is actually inserted in the slab of glass as
shown in Figure 2, detai l b). The light radiates in all directions.
The light ray marked 'A' approac hes the interface at a right angle. Such rays along
the normal line are not refracted.
Ray 'B' is refracted , but still leaves the glass. It should be noted that refraction bends
the light away fro m the normal line.
For ray 'C', howeve r, the refraction is just enough to make the light follow along the
glass surface .
At the angle of ray '0' and sma ller angles of rays , the light is reflected internally.
None of these rays can leave the glass.
The angle at which the internal reflection begins is called the 'critical internal angle'.

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Preliminary Module 5
Fibre Optics
Notes 5 .10 5 .10.1 - HO - 3

For fibre-optical cables the corresponding actio n is show n in Figure 3. Light enteri ng
the conduit at angles less than twice the critical angle will be reflected internally . Then
the light is propagated along the cable in zigzag directions, bouncing off the walls , but
without leaving the glass.

This angle that allows complete internal reflection is called 'acceptance angle '. All
incident light with a smaller angle, or along the central axis, is transmitted in the
optical cable.

Modal Dispers ion

Light entering the optica l cable or travelling along the central axis takes the shortest
route. At other angles within the acceptance angle, the light must travel a longer path
because of the internal reflections. The time difference betwee n the direct path and
the reflection paths is called the 'modal dispersion'. This factor limits the bandwidth of
the cable.

To minimize the modal dispers ion, the practica l optical cable is made of a bundle of
fine fibres of small diameter. In addition, the fibre is encased in a cladd ing material
that has a higti index of refraction in order to increase internal reflections. In effect, all
the fibres are in parallel to provide a cable with very low losses .

Optica l Transmitter

Often the light source is a spec ial light-emitting diode (LED), operating in the
infra- red (IR) part of the light spectru m, where the wave length is greater than that for
visible light.

In constr uction, the LED is at the bottom of a conical pit and feeds light into the cable.
The LED current and its light output can be modulated over the full passband of all
the cable channels.

Actua lly, the LED is the limiting factor. The bandwidth of the cable itself is far greater
than the bandwidth of the LED modulation circuits.

Another method of transmitting the optical signal uses an injection laser diode as the
light source. This system can accept modulating freque ncies well into the UHF band.

Cable Connectors

One of the problems in fibre optics is the splici ng, or joining, of cables. Care must be
taken to make precise optical alignments at the connection , or excess ive light loss will
result.

Howeve r, special connectors are available to join the cables and keep light losses
within tolerable limits.

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Preliminary Module 5
Fibre Opt ics
Notes 5.10 5.10.1 - HO - 4

Source

Photoe lectric
detector

Figure 1 Principle of an Optical Cable

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Digita l Techniques
Preliminary Module 5
Fibre Opt ics
Notes 5.10 5.10.1 - HO - 5

a) Refraction of light rays

Normal or
Incident ~ perpendicu lar line
light
I
Wavefront I

Air

Glass

"~

I
I
I
Normal

b) Refraction and internal reflections

Ray A
Ray B
No
refraction

~
~ Li9ht ~ I.
source/ \

Figure 2 Refraction of Light and Internal


Reflection
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Digital Techniques
Preliminary Module 5
Fibre Optics
Notes 5.10 5.10. 1 - HO - 6

Glass fibre

Cable

Cladding with different


coefficient of refraction

Figure 3 Fibre-Optical Cable

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Digital Techniques
Preliminary Module 5
Fibre Opt ics
Notes 5.10 5.10.2 - HO - 1

5.10.2 Transm ission Technologies

5.10.2.1 Basic Elements of a Fibre-Optic System

Refer to Figure 1.

The main task of an optical - fibre transm ission system is to convert an electrica l
signal into an infrared light signal, to launch or transm it this light signal onto an
optical fibre and then to captu re the signal on the other end and re-convert it into an
electrical signal.

The basic elements of an optica l-fibre communication system (Figure 1) on the


transmission side are:
o driver
o light source
o source -to-fibre connection
o digital encoder (only for digital signal transmission) .

On the reception side the basic elements are:


o fib re-to-detector connector
o light detector
o amplifier
o digital decoder (only fo r digital signa l transmiss ion).

The transmitter and the receiver are linked by an optical fibre cable.

When the link becomes too long the fibre will attenuate the light waves travelling
down so that the light waves cannot be distinguished from noise . Even with the
highest-intensity light sources and the lowest- loss fibres, the light waves finally
become weak and dim from absorption and scatteri ng. For this reason sometimes it
becomes necessary to 'regenerate' the light signal. The device used for regeneration
of the light signal is called repeater.

The main task of a tra nsmitter is to modulate the light wave (carrier) by a modulating
signal, i.e. the information to be transferred . Th e light wave can be modulated by
o analog ue signals
o digital signals.

5.10.2.2 Fibre-Optic Link

The components needed betwee n transm itters and receivers in a fibre-optic link are
fibre cables, connectors and splices , power splitters and directio nal couplers.

Fibre-Optic Cables

A fibre -optic cable consists of one or more optica l fibres form ed into a cable for
protection. This is necessary, because the cable may be buried directly in the ground,
pulled through underground ducts , hung on telep hone poles or dropped to the bottom
of a lake or ocean.

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Preliminary Module 5
Fib re Optics
Notes 5 .10 5.10.2 - HO - 2

It must be protected against any mechanical stress and for all kinds of stress caused
by the environment, such as te mperature changes from very cold to very hot.

A number of different designs and configurations have been developed to meet all
require ments for protection. These designs differ in materials and arrange ments, but
practically all of them include coatings to protect the individual fib res, strength-bear-
ing materials , filler or buffer materials , and an externa l protective jacket.

Refer to Figure 2.
Figure 2 shows a cabling package used by WESTERN ELECTR IC. The package
consists of 12 ribbons of 12 close ly-packed coated fibres. These 144 fibres are then
wrapped in paper, covere d by a polyethylene jacket and a Kevlar -type braid that is
surrounded by steel wires embedded in a plastic protective sheat h.

Connectors

Connectors are used whenever two fibres, or a fibre and an elect ro-optical source or
detector, are to be joined and disconnected repeatedly. This is generally the case at
fibre terminal equip,ment, optica l patch panels or fibre couplers within a LAN.
Connectors are present at the transmitter and receiver interface as a minimum.
If jumpers and an optical patch panel are used to connect the optical cable and the
equipment , then the number of connecto rs on each end can double.

It should be considered that each connector in a fibre- optic syste m causes an optical
power loss. For th is reason the proper choice of connectors can be significant for the
performance of the syste m.

Refer to Figure 3.

For coupling LEOs, lasers and detectors with spherical and hemisp herical lenses are
used to direct the light rays to minimise the power losses. Howeve r, this tec hnique is
not used for coupling fibres to fibres .
For direct coupling of fibres the most common ly used fibre-connection tech nique is
to put the two fibre ends toget her with a minimum gap and maximum alignment ,
while still allowing for remating when required.

Commonly used connectors are shown in Figure 3. Detail a) shows a ferrule-


mounted light source or detector connector. Detai l b) shows a fibre-to-fibre
connector in which the slightly deformable ferrule slips very snugly into the receiving
bushing.

Couplers

In optica l systems that have been discussed so far, only two te rminals are used, a
transmitting termi nal and a receiving terminal connected by a fib re-optic cable.
However , it is also possib le to attach more than one set of terminals to a single fibre
rather than running a separate fibre or cable for each transm iVreceive pair. For this
purpose , va rious types of couplers are used.

The most com mon application of this technology is within LANs, whereby a common
fibre carries the multiplexed signals from multip le terminals placed at va rious
locations within the LAN.

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Preliminary Module 5
Fibre Optics
Notes 5.10 5.10.2 - HO - 3

Access to the LAN is gained through the optica l couplers that distribute parts of the
signal power on the LAN fibre to each receiver and couple power from each terminal
transmitter onto the fibre.

Couplers affect the performance of a fibre-optic syste m by splitting and distributing


power. The amount of power arriving at any receiver is affected by the amount of
tota l power that each coupler in line has distributed to the path of the receiver.

Refer to Figure 4.

There are va rious types of couplers , such as tree and brunch couplers , star couplers,
directio nal couplers and wavelength-dependent couplers. Each of these types has
its own characteristics. As an examp le, Figure 4 shows the application of a sta r
coupler.

The star coupler is a multiport coupler that permits power from one of n tra nsmit
ports (TXA, TXB , TXC ....TXn) to be split equally to each of n receive ports (RX1,
RX2, RX3....RXn) (detail a)).

Detail b) shows the LAN applicat ion of the star coupler, which is one of the most
common applicatio ns of this coupler type.

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Preliminary Module 5 Fibre Opt ics
Notes 5.10 5.10.2 - HO - 4

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Digital Techn iques
Preliminary Module 5 Fibre Opt ics
Notes 5.10 5.10.2 - HO - 5

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Preliminary Module 5
Fibre Opt ics
Notes 5.10 5.10.2 - HO - 6

a) Ferrule-mounted light source or detector

Photodiode leads

b) Fibre-to-fibre connector

Figure 3 Fibre-Optic Connectors

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Preliminary Module 5
Fibre Opt ics
Notes 5.10 5.10.2 - HO - 7

a) Star coupler principle

TXA RX1
Star coup ler

RX2

RXn

b) LAN application of star coupler

Terminal 1

RX

TX

Terminal n

TX
RX

Figure 4 Star Coupler Applications

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Fibre Optics
Notes 5.10 5.10.3 - HO - 1

5.10.3 App licat ion of Fibre-Optic Links

Nowadays, fibre -optic syste ms are applied in almost all branches of electronics .
Thereby the traditional distinction acco rding to the transmission product (i.e. voice ,
video and data) has become less important and less useful. Today, product and
tec hnology can be more appropriately differe ntiated by the scale and architect ure of
the transmission syste m. The terms
o wide-area networks (WAN)
o metropolitan- area netwo rks (MAN)
o local- area networks (LAN)

classify much better the tech nological differe nces of the transmission products.

5.10.3.1 Fibre Optic Data Bus used in Loca l-Area Network

A local- area network is a multi-terminal multiple access data system . It operates


within a somewhat closed (or private) area, within a limited dista nce and at a fixed
transmission data rate.
Generally, a LAN is a private computer (PC) workstation - and server-based data
transmission network which operates within the office environ ment between hosts
and workstatio n or between PCs .

Historically, the LAN connected a single depart ment in an office, a single floor or a
single building .
In LANs the transmission mediu m and the bandwidth are shared among the stations
of the net. This is achieved by a mechanism called multiple access . T he multiple
access mechanisms are of physical and logical natu re.
The optica l couplers, for example . represent a physica l multiple access device, and
multiple access signal protoco ls represent the logical rules for seque ncing the data
exchange betwee n stations .
There are two multiple access protoco l methods most often used with LANs:
o carrier sense multiple access/co llision detection (CSMNCO)
o fib re-optic distributed data interface (FOOl).

With CSMNCO (more com monly known as Ethernet) , each station listens for anyone
else's transm ission before it attempts to tra nsmit on the LAN and will wait with its
transmission until it is clear to do so.

If two stations would tra nsmit at the same time, then a collision would occu r.
(Figure 1, detail a)). The result is a distorted (collision) signal that is sensed by all
stations. All stations will then stop transmiss ion for slightly differe nt time periods and
then try again.

The FOOl protoco l is a so-called timed-token protocol (better known as toke n ring).
With a timed token protocol (detail b)), each station is sequentially given the
opport unity to tra nsmit by being offered a group of data bits known as token.
The toke n gives the station the right to transmit on the LAN. Therefore, it is passed
around the network from station to station . If a station receivi ng the token has nothing
to transmit, then it will regenerate the token and send it to the next station.

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Fibre Optics
Notes 5.10 5.10.3 - HO - 2

If a station has transmitted a message, it will regenerate the toke n and send it to the
next station once it sees its own signal coming back around.

The role of optical fibres in a LAN env ironment is to replace the more conventional
media of coax and twisted -pair cables in order to reduce electromagnetic interfer-
ences and to increase data rate and distance coverage.

Most LAN standards have concent rated on coax and twisted -pair cables for
transmiss ion rates below 16 Mb/s. With the development and application of
fibre- optic cables the possibility was given for high-speed LANs running at 10 Mb/s ,
16 Ml::i/s , 100 Mb/s or even above .

5.10.3.2 App licat ion of Fibre Optics in Aircraft Systems

Ice-Detection for Rotor Blades of Helicopters

Ice formation on the wings of aircraft and helicopters blades , can cause disruption of
the airflow leading to a loss of lift and subsequently wing sta ll. In fixed wing aircraft it
is important to know where the ice is forming as the handling of the aircraft differs
betwee n main or tail wing sta ll.

The situation is much more critical for helicopters where ice accretion on the main or
tail rotor blade will lead to an increase in drag, and engine power. If unchecked it will
lead rapidly to non-recoverable situat ion. The existing ice-detection systems use
ambient te mperature and humidity from central sensors to determine icing condition,
whic h initiate the de- icing cycle .

Icing is recognised as one of the major safety issues and it is generally been
accepted that new regulations will enforce all aircraft to have some form of ice
warning system , possibly on all flying surfaces .

The fibre optic ice-detection system is capable of transmitting the information from
the rotating frame of the rotor- blade to a stationary frame of the contro l unit.

Deve lopment

The research on fibre-optics techniques in aircraft engineering is still under progress .


Due to its major advantages it will gain more importance in all avionic systems. For
example , among projects flown on the plane are experiments to evaluate fiber optics
for flight- critical control systems, advanced air data acquisit ion systems , and
electrically -powered flight control actuators whic h do not require connection to the
aircraft central hydraulic system . Th e new tec hnologies could lead to lighter and
more efficient aircraft desig ns with higher performance and greater safety.

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Fibre Opt ics
Notes 5.10 5.10.3 - HO - 3

a) CSMAjCD protocol

Simultaneous transmission at t1

,
Termi nal
1
1

!
t1
I Termi nal
2
\ Term inal

!
t1
3

- - - -
Collision at t2

b) Token-ring protocol

t 4 : T1 senses its own


transmitted data
and sends the Terminal
n
token to T2 \

t-: ~~~~ce~ '(;

Terminal
1

t3: T3 accepts message


t2: T1 transmits message
and passes on the
intended for T3
total data stream
Terminal
2

Figure 1 Examples of Multiple-Access


Protocols
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Preliminary Module 5
Electronic Display
Notes 5 .11 5. 11.1 - HO - 1

5.11 Electronic Display

5.11.1 Principles of Electronic Instruments and Displays

5.11.1.1 Electronic Displays Met hods

Refer to Figure 1.
There are th ree main methods by whic h data may be displayed in electronic form:
o light- emitting diode (LED)
o liquid crystal display (LCD)
o cathode ray tube (CRT).
Electro nic, or to be more precise , opto-electronic displays in avionic systems fall into
two broad categories :
o those in which a single register of numeric values is required
o those requiring seve ral lines of alphan umeric information or instructions,
and/o r display of situations in pictorial form.
The operation mode of displays may be either active or passive:
o active :
a display using the effect of producing light when the display elements are
elect rically activated
o passive:
a display which either transmits light from an auxiliary light source after
modulation by the display device, or which produces a pattern viewed by
reflected ambient light.

Light-Emitting Diodes

For status indicato rs, pilot lamps and multisegme nt digital displays , the light-emitting
diodes (LED) are by far the most common device. These solid-state light sources
provide good visibi lity and require very low current and vo ltage levels for light
generation. One of the LED's main advantages is its ability to be driven direct ly by
low-voltage and low-curent signals.
The discrete LED comes in many forms and four main visible colors (red, orange,
yellow and green) . Infra red LEOs are also availab le for use as invisible light sources .
To understand the characteristics of the LED it is necessary to look at the physics
behind it.
Refer to Figure 2.
In most light sou rces , photons are generated by electro ns falli ng to a lower energy
state . It was discove red that certain semiconductor materials generate light when the
electrons fall from the conductio n to the valence energy bands at a diode junction.
The physical properties of the semiconductor material determine how large an
energy drop exists between bands , so establishing the colour of the LED.
LEOs drop their energy at certai n levels. Light-em itting diodes , generate light in very
narrow colour ranges and can in fact generate coherent (essentially monochromatic)
laser light.

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Electron ic Display
Notes 5.11 5.11.1 - HO - 2

Materials that generate photons in the infrared and a portion of the visib le light region
have been found. Galliu m-arsenide phosphide is a good red emitter. Galliu m-arse-
nide phosphite on gallium phosphide is a good yellow emitter. Gallium phosphide is a
fairly good green emitter. There are no blue or violet emitters com monly available
because sem iconductor materials that exhibit an energy tra nsition in the blue range
are rare.

The spee d of response of the LEOs is 90 nanoseconds (ns) for the red and yellow
LEOs and 200 ns for the green LED. Because LEOs are semiconductor devices and
do not rely on therma l effects to generate light, they can be switched on and off very
quickly. This characteristic makes LEOs ideal for light modulation and communication
uses. Some LEOs are capable of being switched on and off at frequencies in the
range of hundreds of megaHertz (1 to 5 ns range) .

Refer to Figure 3.

Interfaci ng an LED to a digital syste m is simple. A gate capab le of providing the LED
with its required vo ltage and current levels can be used. Because an LED is a diode,
it will always drop its forward voltage across the diode junction, and it draws as much
current as is supplied to it. A current-lim iting resistor is then required to put a ceiling
on th is va lue.

If not enough current is available to drive an LED in a given practice, a high- power
driver can be used. If the drive current is marginal and less light is acceptable, good
results can be obtained by simply lowering the drive current.

LED Arrays

Arrays of LEOs can be used to represe nt alphan umeric characters. There are many
pre-assembled LED arrays availab le, ranging from the simp le 7- segment types
found in calculators and digital clocks to 4 by 7 (and higher) dot matrix units.

In theory, interfacing LED arrays is no different from interfacing many single LEOs.
Individual seg ments can be driven with one gate. Specia l decoder-driver circuits are
designed to get a binary-coded decimal code and to drive approp riate array
seg ments to show the input code on the array.

Refer to Figure 4.

In a typ ical7-segment display format it is usual to use one LED per segmen t and to
mount it within a reflective cavity with a plastic overlay and a diffuser plate.
The segme nts are formed as a sea led integrated circuit pack. Their connecting pins
are soldered to a printed circuit board. Depend ing on the use and the number of
digits containing the approp riate quantitative display, independent digit packs may be
used, or combined in a multiple-digit display unit.

LEOs can also be used in a dot-matrix configuratio n. An examp le of such a use is


the type of engine speed indicator show n in Figure 4, detail b). Each dot making up
the decimal numbers is an individual LED. They are arranged in a 9 by 5 matrix.

The counter is of unique design in that its signal drive circuit causes an appare nt
rolling of the digits. This simulates the action of a mechanical drum -type counter as it
responds to changes in engine speed.

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Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 3

liquid Crystal Displays

LED and gas-discharge displays fall into the 'active device ' category: they emit light
as a function of the electrical energy applied to them. The liquid crystal display (LCD)
is a passive device because it simply controls light reflectio n and transmission as a
function of supplied voltage. The LCD acts as a light shutter.

Liquid crysta l displays are com monly used in digital watches and many types of
pocket calculator. They are also used in data displays for aircraft syste ms, e.g. for
the display of selected radio frequencies .
There are two characteristics whic h make LCDs particularly desirable in certain
areas:
o LCDs draw very little power (in the region of a millionths of a watt) because
controlling light with a shutter takes much less power than creating light.
Unlike with an LED, high- level ambient light can not override the LCD.
o Because the LCD is a shutter, the more light is thrown on it the more it will
reflect.

The passive nature of the LCD creates its disadva ntages as well as its advantages .
Because the LCD does not emit any light, it can not be see n in the dark as an LED
can. Solutions to th is problem are:
o the use of built-in lights in the front or in the back of the LCD for in- the- dark
uses
o use of spec ial fluoresence- activated LCDs (FLADs) , whic h use as much
ambient light as possible and direct it towa rd the digits (FLADs still require
some light).
Liquid crysta l displays are easy to interface to almost any logic family. Because they
draw current in the micro- ampere range at potentials of only a few volts, even CMOS
circuits can successfully drive them directly. The only precautio n in using LCDs is to
use only the recommended drive vo ltages for the LCD. Too much drive voltage can
seriously damage the liquid crystal dyes used in the LCD panel.
The basic struct ure of an LCD is shown in Figure 5. It consists of two glass plates
which are coated on their inner surfaces with a thin transpare nt conductor material,
such as indium oxide. The material on the front plate is etched into the sta ndard
display format of seve n seg ments , each of whic h form an electrode. A mirror image
of the digits with its assoc iated electrical contact is also etched into the oxide layer of
the back glass plate. But this is not segmented since it constitutes a com mon return
for all segments.

The space between the plates is filled with a liquid-crystal compo und (esters and
biphenyls are typical) which has a th read-like molecular structure. The molecules are
oriented with their long axes in parallel. The complete assembly is hermetically
sea led with a spec ial thermoplastic material to stop contamination of the liquid- crys-
tal compound by water vapou r and oxygen .

LCD Operation

When a low-voltage, low- current signal is applied to the seg ments from the
decoder/drive circuits, the molecular order of the liquid-crystal compou nd is
disturbed. This changes its optica l appearance from transparent to reflective.

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Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 4

The magnitu de of the optical change is basically a measur e of the light reflected fro m
(or tra nsmitted through) the segment area to the light reflected fro m the backg rou nd
area . An LCD does not emit light, but merely acts on light passi ng th rough it.

Energizing of the seg ments is done by the app licatio n at the same time of a
symmetrical out-of -phase signal to the front and bac k electrodes of a segment,
whic h as a reu lt produces a net vo ltage difference.

W hen two in- phase signals are applied to th e display segments, the net voltage is
zero and the display seg me nts free ly relax to the de -energized state.

For a tra nsmissive read- out, a back -light source is provided. The light is directed by
a ight -control film simila r in its action to a venetian blind . In the area defined by the
energized segment, the light is then scattered up toward the observer to produce a
Iiglit digit or character on a dark bac kgrou nd.

For a reflective read -out, the light- control film is replaced by a mirror. It depe nds on
forward light scattering and also prod uces a light digit on a dark background, but the
light so urce used is exte nsively ambient.

Matrix- Type LCD

The method of directly add ressing eac h segment (as in dedicated displays) beco mes
impossible when a large quantity of information needs to be disp layed , since it
requ ires a separate drive circ uit and wire contact for each image element (plus one
for the counte relectrode) .

A matrix system is used instead. In such a matrix, each image element (or: pixel) is
defined by the inte rsect ion of two arrays of parallel electrodes disposed orthogonal to
eac h other. This makes it poss ible to address 'M by N' pixels with only 'M + N'
electrodes .

The reason behind matrix - addressing is obvious : the display is a lot simp ler by the
reduced num ber of electrical con nections to th e drive circ uits . However, in this case ,
the pixels are no longer individually accessible. The disp lay has the refo re to be
add ressed sequentially, usu ally line -by -Iine.

Unlike a ded icated display (where eac h point is statically controlled) each point in a
mat rix display is exc ited by a signal vo ltage during a fraction of time
= =
(TI N with: N number of rows in the disp lay; T data refresh period) as well as by
stray voltages during the rema ining time, due to the excitation of other points in the
same column.

As the number of disp lay rows increases, the ti me TI N dim inis hes while the stray
voltages gai n in relative impo rtance. This leads to a degradation in the panel's
electro-optical perfo rmance (contrast , viewi ng angle) called 'cross tal k effect'.

This prob lem can be overcome by introducing a switching eleme nt in series with
eac h liquid crystal cell to isolate it from stray vo ltages.

Disp lays using this new sys tem are known as 'active- matrix liquid crystal displays'.

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Preliminary Module 5
Electronic Display
Notes 5.11 5.11.1 - HO - 5

Active -Matrix LCD Operation

The operating princip le of an active -matrix liquid crysta l display is shown in Figure 6.
Here, the voltage fed to each element or pixel is controlled by a transistor. Therefo re
the liquid crystal receives the correct vo ltage during the addressing time TIN and is
isolated from stray voltages during the rest of the time . This explains why active - ma-
trix displays give the same contrast as permanently -excited dedicated displays.
Figure 7 shows a cross-section of an active- matrix liquid crystal display. In this
case , rows and columns of the matrix are disposed on the same substrate.
The upper substrate bears the counter -electrode.
Refer to Figure 6 again.
Active -matrix displays are addressed by applying on the column a video voltage Va
related to the signal to be displayed and, on the appropriate row, a vo ltage VG that
turns on tHe transistor.
The video vo ltage is then applied to the pixel. The transistor is then turned off while
the other rows of the display are successively addressed. A grey-scale effect
(display of intermediate tones) can be achieved by modulating the amplitude of the
video voltage Va between 0 and its maximu m va lue.
Because the pixel does not remain charged indefinitely (due to leakage currents in
both the transistor and the liquid crystal itself) the display needs to be refreshed
periodically. Moreover, to avoid flicker effects , the refresh frequency should be at
least 50 Hz.
In practice , the frame period used is less than or equal to 20 ms. The columns are
addressed alternately by positive ana negative video voltages to cance l out
eletrolysing effects on the liquid crysta l cell.
The counter-electrode voltage VCE changes for each successive frame. All the other
voltages are referenced to this change. The video is inverted at each frame.
This causes a change of the voltage at the pixel fro m Va to VCE and vice ve rsa
during each frame.

Cat hode Ray Tubes

Refer to Figure 8.
A cathode ray tu be (CRT) is an evac uated glass tube that produces images by
focussing an electro n beam on phosphors, which coat the screen area.
The brightness of the display is determined by the current in the beam. Th e beam is
directed by either electrostatic or magnetic deflection circuits built around the neck of
the CRT.
A display is created by systematically sweepi ng the beam across the entire surface
of the screen while varyi ng the intensity. A pattern is traced on the screen showing
graphically the changes of the electrical input. The cathode ray tube is mainly an
indicating device .
The CRT has many uses, e.g. displaying current and vo ltage wavef orms in the
oscilloscope , as the display of a radar set or for presenting a telev ision picture. In the
latter case , the brightness of the spot is changed as well as its position on the
screen.

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Electron ic Display
Notes 5.11 5.11.1 - HO - 6

Essential Elements of the CRT

The important elements of a CRT may be listed as follows:


o an electro n gun which 'fires' the electro ns at a fluorescent screen
o a means of focussing the electrons so that they arrive at the screen at a
single point; electrostatic or magnetic focussing may be used
o a means of deflecting the electron beam; electrostatic or magnetic deflection
may be used
~ a screen which becomes luminescent under the impact of the electron beam.

The Electron Gun

Refer to Figu re 9.

When a cathode is heated , it emits electro ns. In the CRT (as in a valve) the sou rce of
electrons is a cathode. But in the case of the CRT this cathode is spec ially designed
so that it emits electro ns in one direction and from one end only.

The first step in the formatio n of an electron beam is the product ion of a stream of
electrons which all travel into the same direction . This is done by using suitab le
voltages to a spec ially-shaped control grid and anode, whic h are placed on the same
axis as the cathode.

The anode is merely a metal disc with a hole in its centre. The control grid (which
surrounds the cathode) is a metal cylinder with a hole cut in the centre of its
end-plate. The holes in the anode and grid are aligned with the cathode to form an
obstruction -free path along which the stream of electrons can pass.

When a positive voltage is applied to the anode , the electrons emitted by the cathode
will be accelerated towa rds it. If, at the same time, a negative vo ltage is applied to the
grid, the moving electrons will be conce ntrated into a beam along the axis of the
three electrodes. Most of the electrons will pass through the hole in the centre of the
anode.

The density of the electron-beam, i.e. the number of electrons which pass through
the anode and strike the fluorescen t screen , can be altered by varyi ng the negative
voltage applied to the grid. As the brilliance of the spot formed on ttie screen
depends partly on the number of elect rons which strike it, the negative voltage
applied to the grid is an obvious choice for use as a 'brilliance control '.

Focuss ing

Refer to Figure 9 again.

The beam of electrons produced by th is system of electrodes begins to spread out as


it leaves the hole in the centre of the accelerating anode . A diverging beam like this
would produce a comparatively large illuminated area when it struck the screen of
the CRT, whereas what is needed is a small spot.

The electrons must then be focussed so as to form a converging beam which will
eventually become so narrow as to finish up as a mere point on the screen.

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Electronic Display
Notes 5.11 5.11.1 - HO - 7

Cathode ray tubes are of either of two main focussing types :


o electrostatic tubes , in which focussing and deflection are due to the action of
electric fields
o magnetic tubes , in which focuss ing and deflection are carried out by the
action of magnetic fields.

Both these types are in common use. However, tubes are not rigidly classified in this
way since there are changes for different purposes . Like TV screens , disp lays being
used in aircraft are based on magnetic deflection .

Magnetic foc ussing relies on the fact that, when an electron enters a magnetic field ,
its direction of movement is changed . The amount of this change of direction
depends on the strength of the fie ld.

In this method of focuss ing, a current is passed through a coil placed round the neck
of the tube . The shape and strength of the resulting magnetic field will depend on
three factors:
o the size of the coil
o the exact location of the coil along the CRT
o the amount of curre nt flow ing through the coil.

Electro - Magnetic Deflection

Refer to Figure 10.

The electro -magnetic method of deflectio n uses on the same principle as the
electro- magnetic method of focussing. Electrons are deflected when they come
under the influence of a magnetic field.

A set of deflection coils is placed around the outside of the neck of the CRT in such a
way, that the axis of thei r magnetic fields is at right angles to the path of the electron
beam. The amou nt of current passing through ttiese deflecting coils determ ines the
strength of the magnetic field produced.

The ve rtical deflecting coils are wound in such a way that their fie lds reinforce one
another in producing an even magnetic field. The horizontal deflecting coils are
wound similarly. The result is to produce an even 'deflection sensitivity' over the
entire screen.

The Screen

Refer to Figure 11.

The only point not yet expla ined is the coating round the inside of the tube just in
front of the scree n. This coati ng is formed by painting a solution of graphite on the
inside of the tube and allowing it to dry.

A vo ltage is applied to the coating similar to that applied to the seco nd anode, which
gives the electrons a return path to earth close to the screen and stops them from
building up into a space charge near the screen (which would tend to defocus the
beam). The coati ng also effectively scree ns the beam fro m externa l electrostatic
fields.

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Electron ic Display
Notes 5.11 5.11.1 - HO - 8

In some CRTs, the graphite coating is applied in a thin ring close to the tube face . If a
much higher vo ltage is applied to this coating than is applied to the second anode,
the electrons will be acce lerated after they have passed the deflecting plates .
Because they are trave lling faster, they will possess more energy, so increasing the
brightness of the spot.

This use of the graphite coating as a final anode is known as 'post- deflection
acce leration (PDA)'. PDA is used in tubes in which changes in the shapes of the
waveform occur very quickly (in the region of micro-seconds).

An effect similar to PDA can be done by increasing the voltage on the seco nd anode .
But th is would mean that the electrons would pass the deflecting plates much faster,
and so would be deflected to a lesser extent. Deflection sensitivity would then be
reduced .

Looking from the front of the tu be, the rear of the phosphorus is coated with
aluminium. Th is coati ng serves two functions: it increases the contrast of the picture
because no light can Renetrate to the rear of the tube and brighten the backgro und.

Because of the beam electro ns colliding with remaining air molecules, ions are
produced which are not deflected (because of their higher mass) and would cause
the phosphorus at the centre of the screen to be quickly destroyed . To stop th is the
ions remain on the aluminium coati ng.

The inner and outer of the cone is coated with a conduct ive layer. The outer coat is
connected to ground. The inner is connected via a stee l wire. This wire passes
through the glass and is connected to the anode and hence the anode voltage.

Both conducti ng layers and the glass between them function as a conde nser which
can supply voltage long after the equipment is switched off.

Colour Picture Tubes

All colours are a product of the primary colours , red, green and blue. The illumination
layer of the screen consists of three different phosphors , applied to the inside of the
picture screen (either in the form of points or lines). When these phosphors are hit by
electrons, they illuminate in a particular primary colour.

The composition of compound colou rs are:


o red+ green yellow
o red + blue = purple (magenta)
o green + blue = cyan
o blue + green + red = white.

An aluminium layer with a thickness of few urn is located behind the phosphorus.
A mask having the same form and curvature as the illumination layer is mounted
approx. 15 mm from the scree n. A special type of mask, the TRINITRON mask ,
cons ists of harp-like tens ioned wires which are mounted vertically.

The frame is made of a steel plate and faste ned with spec ial bimetal spri ngs (inside
the glass tu be). The frame is under mechanical tension causi ng the wires to remain
taut (tight).

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Digital Tec hniques
Preliminary Module 5
Electronic Display
Notes 5.11 5.11.1 - HO - 9

Refer to Figure 12.

The three electro n guns produce three separate electron beams. There are
three separate optics with a common focus. The beam intensity is controlled as in a
black-and-white tube . Th e focus vo ltage, however, differs greatly (the colour tube
has a much greater vo ltage). Afte r focussing, the three electron beams move almost
parallel through the deflection field.

They are deflected together in the X or Y directio n. The three beams converge at the
mask and cross. For every three colour strips (blue, green and red) there exists one
wire. This wire allows only the electrons of that gun to pass the phosphorus of which
is to be effected .

Colour picture tubes are sensitive to the influence of exterior magnetic fields. As the
beams are magnetically controlled, exterio r fields lead to colour impurities.

Principles of Picture Transmission

An electron beam starts in the left-hand corner and moves horizontally across the
screen . This action is called a 'horizo ntal scan '. The beam is then blanked (or turned
OFF) to avoid interfere nce with the display on the scree n, and turned to the left side
to start another scan. The time for this horizo ntal retrace is much shorter than the
sca n time.

During the horizo ntal scans , tlie beam slowly moves down the screen until it reaches
the bottom. At this point, the beam has made many horizontal sca ns and one vertical
sca n. The beam is then blanked and rapidly returned to the top to start another
vertical scan.

A further method is used to present a flicker -free picture , the interlaced scan ning
tec hnique.

Refer to Figure 13.

Commonly, two types of raster sca nning are used in CRTs:


o interlaced
o non-interlaced.

In the interlaced method all odd - number lines are transmitted first (starting with line
1). Then the even -number lines are transmitted (starting with line 2). This works well
in TV applicatio ns where colou rs and shadings change gradually. Two sca ns are
made down the screen for one single picture (or: frame). Both sca ns overlap (or
interlace) into a single frame.

In European TV systems, there are 262 .5 horizontal lines per scan and a total of
525 lines per frame. Th e sca n rate is 50 Hz and the frame rate is 25 Hz. The frame
freq uency was derived in the initial stages of television from the mains frequency
(50 Hz) giving 50 half frames per seco nd.

In the display of characters however, non-interlaced scan ning is more com monly
used. In non-interlaced sca nning the beam starts on the same sca n line each time
so that the frame rate is 50 Hz (in European systems) .

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Preliminary Module 5
Electron ic Display
Notes 5.11 5.11 .1 - HO - 10

Higher density displays are needed for some of the more advanced term inals. Future
develop ments will surely use the interlaced method. To get more characters on the
screen , some data CRTs use a higher sweep frequency .

The horizontal oscillator frequ ency can range from 15,720 Hz (which gives 262 sca n
lines per sca n) to 50,000 Hz (which gives 833 sca n lines).

Refer to Figure 14.

To generate a legible display, the horizontal and vertical oscillators must be kept in
step' with each other and with the displayed information. This is done by generating a
horizo ntal sync and a ve rtical sync signal. Each of these causes its oscillator to be
reset and starts the beam over again at precisely the correct time.

As the beam sca ns off the edge of the screen , it must be blanked until it reaches the
position where data is to be displayed. The beam must also be blanked during
retrace both in the horizontal and vertical directions. The signal that controls the
electron beam is called 'blanking' or 'display enable'.

Character Generation

Refer to Figure 15.

The most common method of generat ing characters is to create a matrix of dots, 'x'
dots (or columns) wide, and 'y' dots (or rows) high. Each characte r is created by
selective ly filling in dots.

As 'x' and 'y' get larger, a more detailed character can be created. Two common dot
matrices are 5 by 7 and 7 by 9. Characte rs require some space betwee n them, so
they are placed in a character block that is larger than the character.

Refer to Figure 16.

As the electro n gun of the CRT scans one line across the screen, it displays the first
row of dots for each character on that character line. On the next sca n, the second
row of dots and spaces for each character are displayed. Then this sequence is
repeated for every character line on the scree n.

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Preliminary Module 5 Electronic Display
Notes 5.11 5. 11.1 - HO - 11

D No.of segments 6
0123'-156189
2 5 5 4 5 6 376

IS-I!I 1\171
II \1 171\1
- --
b) 13 and 16 segments
1-' U 1-
r -, JJ 1_
-I'_ I '\=-..= 1-,- 11---=1 I,- -,I -I_ I_II F=: ]] C~ 1:1==F=[=11--1~[ LJ
Ij 1 1\11 1\ I I-I '~I '-I 1=-=' r. -, Ij I t\1I t\ , '- -I [ ] r -I [ ] r T
I \ 1_ I I I \J I_I' I~I I \ _ I I \ L_ I I I \J '- J
I L~ I \ ==, I
I I I / 1 I \/ \I / 111/1 1\1\1 /
1_' V V\I / \ / L '--' V V\I 1\ I C
,~ ~ L J 1::- 1_ _ 1 1=-=11=-=' li t 1 -I ] II r j- 7 rl r n /
11_ _ I I ~ '_ I 1 I_I _, IL l / r -' -I =1 D/ 0 =, U 1

c) 4-by-7 matrix

• •


• •

• T 7 rows

~
• •
• •
• •
~
....
8
iJ.J

Figure 1 Electronic Alphanumeric Displays

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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 12

. - --""
Protective cover/
diffuser lens

Crystal chip

LED

- -- f
-- Effective
segment
height

Plastic overlay

Circuit board Plastic overlay

Figure 2 Light-Emitting Diode


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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 13

+5 V

TIL qate

>-
+-'
"00
c
2 3.0
c
en 2.5
:J
oc 2.0
"E 1.5
:J
ill 1.0
>
~ 0.5
ill
II 10 20 30 40 50
Forward cur rent - mA

Figure 3 LED Driving Circuit

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Digita l Techniques
Preliminary Module 5
Electronic Display
Notes 5.11 5.11.1 - HO - 14

a) LED array and array drives


These pins are common to
all cathodes in each column
.-----...,
o
+-'
1
c
13 0:5:
I~I
0 00 0
10 Eo
E ... DODD
8
Pin ooC ----f{jD DDD
7 UU

;1:-::1
ro ~DDD D
2
~ O)
- 11
6
roc
w·w
~DDDD
DO D D
dp .~ 0)
0:0
0)0
Wc Individual LED
O)ro
oC=
I-ctl

b) Engine speed indicator with a dot matrix LED

Figure 4 Display of Data by LEOs

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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 15

Liquid crystal
layer
(typical spac ing
= 10 microns) r:: /
~

Back Plate/'y~~
Mirror image
(not seg mented)

Figure 5 Basic Structure of an LCD

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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 16

Column
_____ (source)

TFT
(thin-fi lm transistor)

h;::=:!=~
G
V
Row (gate)
· - -
7 ..

Liquid crystal
.
Counter-electrode -
~ "I
I
VeE

Figure 6 Operating Principle of an


Active-Matrix LCD
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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 17

Upper glass plate Counter- electrode

/ )--------------------
/
/
/
/
/
/
/
/
/
/
/

,L--F-=======tq=====f:.~==\~~_./ 7' Row electrode

) \ Lower glass plate


TFT Column Pixel electrode
electrode

Figure 7 Cross-section of an Active-Matrix LCD


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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 18

Glass enve lope


Permanent magnets
(l:5eam focussing)

Grid ~
Heater ~ V "' " Screen

~~ E!l"-------l
Cathode/ ' ':1,U;~
T 7
.::: : "-: : :. "
Anode /
Electron
beam
Deflecting
coils

Graphite coating
(collects secondary electrons
to preven t screen from beco ming
negatively cha rged)

Figure 8 Cathode Ray Tube

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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 19

Hollow cylinde r
(grid)

I Divergent
beam of

1 ~
electrons

Cathode Metal disc


(acceleration anode)

Figure 9 Electron Gun

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Digital Techn iques
Preliminary Module 5 Electro nic Display
Notes 5.11 5.11.1 - HO - 20

8 01190 3
-0
Q)
roo
U
I
'-
o
..c c
Q.Q)
enQ)
0,-
..cu
Q..en e
o
.-
'0
CI)

I
1\
~
/
C
/
/ e
.-
roc
+-'0 /
/ 1i)
co .-+-'
U /
/ e
.N
- Q)
C)
0 ;;:::: I
I
/
/ m
I~ /
E
o
...o
~

-w
CI)

o
,....
CI)
~
::J
C)
.-
L1.

Q)
-0
o
..c
ro
o

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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 2 1

Electron guns

;rhree electron beams Shadow mask Glass faceplate

Mask aperture ~~-----il

Phosphor line screen

Figure 11 Tricolour In-Line Picture Tube


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Digita l Techniques
Preliminary Module 5
Electronic Display
Notes 5.11 5.11.1 - HO - 22

G B

R
G
B
R
G
B
R
G
B

,
Shadow mask
'I t
I I

Coating

Figure 12 Colour Picture Generation


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Digita l Techniques
Preliminary Module 5
Electronic Display
Notes 5.11 5.11.1 - HO - 23

a) Non-interlaced

- - ... -

b) Interlaced

- - - -- . - "......- '--- -- --
........-.-

.. .. -
----------
..
-
.
... ..
...
.. ....

-------- - - --
- .. ..- -...:....:.. - -.. --
..

-- -.. .. .
- ---- ~ -.. - - - -
...

Figure 13 Interlaced and Non-Interlaced Raster


Scanning
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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 24

Blanking
H - sync ----J~

A: B= "C Line

11


r

Horizontal
retrace
Display. period period

(
r
~
, ~

Vertical retrace period

01 U
C c
:.i:
c >-
CI)
crl I
co >

Figure 14 Controlled CRT Display

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Digital Techniques
Preliminary Module 5
Electr onic Display
Notes 5.11 5.11.1 - HO - 25

Row select truth table

RS3 RS2 RS1 RSO Output


Row
0 0 0 0 RO no.
0 0 0 1 R1
0 0 1 0 R2 DDODOOO R15 DODODOO
0 0 1 1 R3 •••••• 0 R14 DODODOO
. D D D O O. R13 DODODOO
0 1 0 0 R4 . D O D O O. R12 DODODOO
0 1 0 1 R5 . D O D O O. R11 . 0 • • • 00
0 1 1 0 R6 •••••• 0 R10 • • DOD .O
0 1 1 1 R7 . DDDOOO R9 . O D O D. O
. DDDOOO R8 . O D O D. O
1 0 0 0 R8 . DDDOOO R7 • • DOD .O
1 0 0 1 R9 . DODOOO R6 . 0 • • • 00
1 0 1 0 R10 D D O D O OO R5 . O D O DO O
1 0 1 1 R11
DDDDDDD R4 . DDDDDD
ODODOOO R3 . ODODOO
1 1 0 0 R12 DDDDOOO R2 DODODOO
OD GDO EJO R1 DODODOO ~
1 1 0 1 R13
1 1 1 0 R14
ODODOOO RO DODODOO lJJ
06 DO 06 DO
1 1 1 1 R15

Figure 15 A 7 by 9 Dot Matrix in a 9 by 16


Character Block
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Digital Techniques
Preliminary Module 5
Electron ic Display
Notes 5.11 5.11.1 - HO - 26

en
1
2
:>

•••

• •• • •• •• •• •••
•• • • • •
• •• •
• •
• • • • • •• •••
Q) 3
c 4
c 5
as
o 6
•• •
• •• •
• ••• • ••• ••
(f)
7
8
••• • •• en
'"
:g
9 • UJ

Figure 16 Dot Matrix Scanning (5 by 7 Characters)

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Digital Tec hniques
Preliminary Module 5 Electrostatic-Sensitive Devices
Notes 5.12 5.12. 1 - HO - 1

5.12 Electrostatic-Sensitive Dev ices

5.12.1 Handl ing Precautions

5.12.1.1 Electrostatic Charges

A typ ical working environment for electronic component handling showing potentia l
electrostatic discharge (ESD) hazards, is documented in Figure 1.

Electrostatic charges can be stored in many things ; e.g.


o man-m ade fibre clothing
o plastic stora ge bins
o sheet of paper stored in plastic envelopes
o paper from electrostatic copyi ng machines
o people.

The charges are cause d by friction between two surfaces , at least one of which is
non-conductive. The magnitude and polarity of the charges depend on the
o different affinities for electrons of the two materials rubbing togethe r
o frictio n force
o humidity of surrounding air.

Electrostat ic discharge (ESD) is the transfe r of an electrostatic charge between


bodies at different potentials and occurs with direct contact or when induced by an
electrostatic field.

Mostly all pins of semiconductor devices are protected against electrostatic dis-
charge.

5.12.1.2 Workstation for Electrostatic-Sensitive Dev ices

Figure 2 shows a working area suitable for safely handling electrostatic-sensitive


devices. It has a workbe nch, the surface of whic h is conductive and anti-static.
The floor shou ld also be cove red with anti-static material.

The followi ng ESD precautions should be observed when handling semiconductors :


o Persons at a workbench sho uld be earthed via a wrist strap and a resisto r.
o All mains-powered equipment shou ld be connected to the mains via an
earth- leakage switch.
o Equipment cases shou ld be grounded.
o Relative humidity should be maintained between 40 and 50 % .
o An ionizer shou ld be used to neutralize objects with immo bile static charges
in case other solutions fail.
o Keep static materials , such as plastic envelopes and plastic trays etc., away
from the workbe nch. If there are any such static materials on the workbench,
remove them before handling the semico nductor devices.

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Digital Techniques
Preliminary Module 5 Electrostatic-Sensitive Devices
Notes 5.12 5.12.1 - HO - 2

5.12.1.3 Rece ipt and Storage of Components

Electrostatic- sensitive devices are packed for despatch in anti-static/conductive


containers , usually boxes , tubes or blister tape . Warning labels on both primary and
secondary packing show that the contents are sensitive to electrostatic discharge.

Such devices should be kept in their original packing whilst in storage. If a bulk
container is partially unpacked, the unpacking shou ld be done at a protected
workstation. Any componen ts that are store d tem porarily should be packed in
conduct ive or anti-static packing or carriers.

5.12.1.4 PCB Assembly

Electrostatic-sensitive devices must be removed from their protective packing with


grounded component-pincers or short-circuit clips. Short-circuit clips must remain in
place during mounting, solde ring and cleansing/dryi ng process . Don't remove more
componen ts from the storage packing than are needed at anyone time.

Production/asse mbly documents shou ld state that the product contains electrostatic-
sens itive devices and that special precautions need to be taken. During PCB
assemb ly, ensure that the electrostatic-sensitive devices are the last of the compo -
nents to be mounted and that th is is done at a protected workstation

All tools used during PCB assembly, including solde ring tools and solder baths, must
be grounded. All hand- too ls should be of conductive or anti-static material and,
where possible, shou ld not be insulated.

5.12.1.5 Testing PCBs

Completed PCBs must be teste d at a protected workstation . Place the solde red side
of the PCB on conductive or anti-static foam and remove the short -circuit clips.
Remove the PCB from the foam, holding the board only at the edges . Make sure the
PCB doesn't touch the conductive surface of the workbench.

After testing, replace the PCB on the conductive foa m to await packing.

Assembled circuit boards containing electrostatic-sensitive devices shou ld always be


handled in the same way as unmounted components. Th ey shou ld also carry
warning labels and be packed in conductive or anti-static packing .

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Digital Techniques
Preliminary Module 5 Elect rostatic -Sensitive Devices
Notes 5.12 5.12.1 - HO - 3

o
·z(/)
eu (/)
a.. Q)
0-
0- o
o
....... Q)

i~
Q)
..0
eu
.......
..... tn
Q)

o> a.. 0)
c
"C
~
0)
c 'C
o
ca
.§ N
o !2-o / fJOO8 B
ca
..0 ....... J:
(/)
eu C
0-
en
W
-...
ca
.-
e
(1)

"0
a..
,....

(/)
c
:0 0-
Q) 0
0) .......
eu
..... Q) eu
.....
0 ..0 Q)
.......
(/) eu
....... >
0
o o C
....... .......
(/) (/) 0
eu eu >.
a.. a.. z

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z"'C
~ I~I
CD ,~
Conductive Electrostatic
o... CD~
CD =:
..,
:J
~
g.
~
'~"
compartment trays voltage sensor tn 3 _.
::::J
~ ~~ D)
-~ '~" to<
~

Q!. :-I
2. 2:;
::J :::: .
~.
Colton overall
R<>
~
- ~
g ~
G> ;:;.
3
0-
;I
~

~
:T
en
rofh o
(]lc.
CD

~
:.. . c
t\) -
a.
CD
Supply Conductive boots or oi
earth heel grounding protectors

Conductive stool m
CD
g.
.....
o
en
Strap (resistance between ![
0.9 MQ and 5.0 MQ o'
1
Common reference point en 0_.
CDco
(]l:::J;:::+
:.....~Ol
Ground Conductive floor mat ro
....L
<'
CD
-=-l
~
' o :::r
I
o oCD~ . ..Q'
:::J

Figure 2 ESO-Protected Workstation .p.


c
CD CD
en en

For Training Purposes Only Page205


Digita l Techniques
Preliminary Module 5
Software Manage ment
Notes 5.13 5.13. 1 - HO - 1

5.13 Software Ma nagement Control

5.13.1 Introduction to Software Ma nagement Control

General Information

Refer to Figure 1.
A digital line replaceab le unit (LRU) is a black box of electro nics, for a complex
engineered system like an aircraft, ship or other vehicle.

Every digital LRU (line replaceable unit) consists of:


[:J Hardware
that comprises all of the physical parts , as distinguished from the data it
contains or operates on.
D Software
that provides instructions for the hardware to accomp lish tasks .

Hardware

LRUs speed up repair, because they can be replaced quickly, restor ing the big
syste m to service . They also reduce the cost of systems , and increase the quality,
by spreading development costs of the type of unit over different models of ve hicles.
LRUs are designed to specifications. The spec ification defines the inputs and
outputs. It also defines the tools to replace the unit (usually nothing more than a
screwdrive r), and the bulk and weigHt (they always need to be carried by one man,
and fit through a door, if possible) .
There are also requirements for flammability, unwanted radio emissions, resistance
to damage from fungus, static electricity, heat, Rressure , humidity, condensation
drips, vibration , radiation and other environmental measurements.
Many LRUs for commercial aircraft are designed accordi ng to ARINC spec ifications .
ARINC (Aeronautica l Radio Incorpor ated) is a company owned by a number of
airlines , that sells specifications and sets standards . LRUs are also defined by
aviation manufacturers, or various military organizations.

Software

Software is essentially a computer program encoded in such a fashion that the


program (the instruction set) contents can be changed with minimal effort.
Software can have va rious functions such as controlli ng hardware , perfor ming
computations, communicatio n with other software, human interaction, etc ; all of
whic h are prescribed in the program.

Digital Hardware Components

Digital componen ts are electric circuits based on a number of discrete voltage levels.
In most cases there are two vo ltage levels: one near to zero volt and one at a higher
level dependi ng on the supp ly vo ltage in use. These two levels are often represe nted
as L and H.

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Digital Tec hniques
Preliminary Module 5
Software Management
Notes 5.13 5.13.1 - HO - 2

Development examples of digital components are:


D CPU (central processi ng unit)
A CPU refers to part of a computer that interprets and executes instruc -
tions and data contained in software. The more generic term processor is
somet imes used to refer to a CPU as well.
D Memory address registe r
A memory address register is the register of a computer 's control unit that
contai ns the address of a register to fetch or store from or to the com-
puter storage.

The memory address register is half of a minimal interface betwee n a


microprogram and computer storage . The other half is a memory data
registe r.
5J RAM (random access memory)
A RAM is a type of computer storage (in practice only computer chips)
whose contents can be accessed in any (i.e., random) order.

RAM is typically used for primary storage (main memory) in computers to


hold actively used and actively changing information, although some
devices use certain types of RAM to provide long- term secondary
storage.
D ROM (read only memory)
A ROM is used as a storage medium in computers. Because it cannot
(easily) be written to, its main uses lie in the distribution of firmware (soft-
ware that is very closely related to hardware , and not likely to need fre-
quent upgrading) .
D UV EPROM
The original erasable non-volatile memories were EPROM's; these could
be readily identified by the distinct ive quartz window in the centre of the
chip package .

These operated by trapping an electrica l charge on the gate of a


field- effect transistor in order to change a 1 to a 0 in memory.

To remove the charge , one would place the chip under an intense
short-wavelength fluoresce nt ultraviolet lamp for 20-30 min, returning the
entire chip to its original blank (all ones) state.
D EEPROM (electrically erasable programmable read only memory)
An EEPROM is a non- volatile storage chip used in computers and other
devices. Unlike EPROMs , EEPROMs can be progra mmed and erased
electrically.
D EPROM
An EPROM, or erasable programmable read only memory, is a ty pe of
computer memory chip that retains its data when its power supp ly is
switched off. In other words , it is non- volatile. A programmed EPROM
retai ns its data for about ten to twenty years and can be read an unlimited
number of times.

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Digital Tec hniques
Preliminary Module 5
Software Management
Notes 5.13 5.13.1 - HO - 3

o Decoder
A decoder is a device which does the reverse of an encode r, undoing the
encoding so that the original information can be retrieved. The same
method used to encode is usually just reversed in order to decode .
In digital electron ics this would mean that a decoder is a multiple - input,
multiple -output logic circuit that converts coded inputs into coded
outputs, where the input and output codes are different (BCD decoder) .

Program Interc hange

Program interchange can be performed by:


o Portable data loader (PDL)
o Airborne data loader (ADL)
o Cont rol display unit (CDU)
o Onboa rd Replace Modules (OBRM).

Portable Data Loader

Refer to Figure 2.

A portable data loader has direct access to the LRU via a test socket. Digital data
interchange is usually performed by means of a floppy disc.

A modern PDL (Figure 2) is capab le of performing LRU data loading with or without
the use of floppy discs. The PIDL includes an interna l mass sto rage device that can
host the loadable software for an airline's entire fleet.

Airborne Data Loader

Refer to Figure 3.

An airborne data loader is mounted in the aircraft. It is used to upload and download
software and data from/to on-board computers. A typical ADL can load navigation
databases and operational flight programs as well as perform multi- volume data
recording and blank disk formatting.

Control Display Unit

Refer to Figure 4.

Program interchange is performed under the use of the menu 'programming' on the
contro l display unit. After the password is entered the changes can be carried out by
the keyboa rd.

Onboard Replace Modules

Onboard replaceable modules, that contai n the software to be interchanged, are


located on the front panel of the LRU. They are replaceable by maintenance
person nel.

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Digita l Techniques
Preliminary Module 5
Software Manage ment
Notes 5.13 5.13. 1 - HO - 4

Figure 1 Installation of a LRU (Example)

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Preliminary Module 5
Software Manage ment
Notes 5.13 5.13. 1 - HO - 5

Figure 2 Portable Data Loader (Example)

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Preliminary Module 5
Software Manage ment
Notes 5.13 5.13. 1 - HO - 6

Figure 3 Airborne Data Loader (Example)

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Preliminary Module 5
Software Manage ment
Notes 5.13 5.13. 1 - HO - 7

Figure 4 Control Display Unit (Example)

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Digita l Techniques
Preliminary Module 5
Software Manage ment
Notes 5.13 5.13.2 - HO - 1

5.13.2 Software Definition, Handling and Modif icatio n

5.13.2.1 Software Definition

Onboard Loadab le Software Categories

Many newer aircraft feature loadable systems whose functionality may be changed
or updated using onboard loadable software. Modifying system functionality with new
software instead of with modified or new hardware can help operators reduce the
tota l number of hardware line LRU in inventory, increase hardware com monality,
and reduce airplane modification time.
Loadable software falls into seve ral catego ries acco rding to function:
o Operational progra m software (OPS)
o Operational progra m configuratio n (OPC)
o Database
o Airline modify -able information (AMI).

Operational Program Software (OPS)

The operati ng syste m of an LRU, the OPS acts on data contained in the operat ion
program configuration (OPC) files to define the function of the LRU. The OPS is
typically the largest , most complex software associated with an LRU, both in the
amount of information it contains and the time required to load the software.
Obtai ning certificat ion for new ve rsions of an OPS requires commensurate time and
effort.

Operational Program Configuration (OPC)

This software is a specialized database that determines the LRU configuratio n and
function by enabling or disabling optional features contained in the OPS. Configur-
ation information is also supplied to many LRUs through hard- wired discretes
(program pins).
The large number of possible combi nations of software and progra m-pin configur-
ations complicates configuration management. Though an OPC will probab ly never
completely replace progra m pins, as much config uration information as possible is
placed in the OPC.
The OPC is small compared to the OPS and typically requires less than one minute
to load.

Database

A database is a collection of data arranged for easy access and retrieval by the
operating syste m of an LRU. Some of the databases used by software loadable
LRUs are:
o Flight manage ment computer (FMC) navigation database (NOB)
o FMC model/engine database
o FMC performance defau lts database
o FMC quick reference handbook takes -speeds database

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Preliminary Module 5
Software Manage ment
Notes 5.13 5.13 .2 - HO - 2

o Airborne communications addressi ng and reporting syste m database


o Com mon display system display -unit database
o Digital flight data acquisition unit (DFDAU) mandatory database
o DFDAU ARINC 429 broadcast database.

The NOB, which is quite fami liar to operators , is a database of navigation and route
informat ion used by the FMC to carry out navigation tasks. NOB software is typically
revised every 28 days and becomes available approxi mately one week before it
becomes effective. Unlike other loadable software , the NOB is date controlled as
opposed to part number controlled.

Airline Modify-Able Information (AMI)

AMI is another small data file that supp lies information to the OPS of some LRUs.
The operator generates the AMI data file to specify prefere nces for functions such as
cabin management data recording , report generation and formatting, and services
provided to the va rious passenger seating zones

AMI data files are used by some LRUs to provide informat ion used by the OPS.
On some airplanes. for examp le, when data needs to be recorded or formatted ,
reports generated, or seating zone services spec ified , the appropriate OPS refers to
the AMI data file for the necessary information to accomp lish the task.

An AMI data file is typically data rather than progra ms or executab le code. However,
AMI data files for some systems include logic units, whic h are high- level program
code.
To what extent AMI data files can be modified is controlled by the certified OPS of the
LRU, which prevents operator modifications from affecting safety, regardless of
whether the modifications are correct. It is only on this basis that such modificatio n is
permitted without certification authority review.

Software Leve l Definition

The RTCA document


o Guidelines for Development of Aviatio n Software

has become a de facto stan dard and is the accepted means of certify ing all new
aviation software . The document is prima rily conce rned with develop ment processes .
As a result, certification to this document requires delivery of multiple suppo rting
documents and records.
The quantity of items needed for certification , and the amount of information that they
must contain, is determined by the level of certification being sought.

The targeted certification level is either A, B, C, D or E. Correspondingly, these levels


describe the consequences of a potential failure of the software:
o Catast rophic
o Hazardous- severe
o Major
o Minor
o No effect.

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Software Management
Notes 5.13 5.13.2 - HO - 3

The certification process is most demanding at higher levels. A product certified to


level A would have the largest potential market, but it would require thorough,
labor- intensive preparation of most of the items on the support list.
Conversely, a product certifying to level E would require fewe r support items and be
less taxing on company resources. Unfort unately, the product would have a sma ller
range of applicability than if certified at a higher level.

5.13.2.2 Software Handl ing and Modification

Introduction
Onboa rd loadable software allows operators to change the config uration of loadable
sy,stems without physically modifying or replacing hardware com ponents. Benefits
include the ability to meet new requirements, incorporate design improvements, and
correct errors.
In addition, softwa re often can be loaded just in the time required to turn an airplane
around for the next flight. A main advantage of changing system functionality without
changing hardware is the reduced number of LRU spa res in stock .
It is cost effective to preload the LRUs for some syste ms before installation on the
aircraft. The total time required to configure a complete system can be significant.
For example, loading aircraft's integrated display units (IDU) requires 15 minutes
each, for a total of 90 minutes, if each IDU is loaded successfully on the first attempt.
Many systems comprise hardware and software compo nents. A loadable system is
different because it consists o~ loadable software parts and loadable (hardwa re)
LRUs that are indepe ndently configu red at the aircraft level.
Softwa re can be transferred into a software - Ioadable LRU using various equipment
as already mentioned . A few systems can be onboard - Ioaded by inserting the
medium into the LRU itself . The approp.riate equipment used to load an LRU
depends on the system .
For aliloadable systems, the software parts installed as part of the syste m are
identified electro nically; a placard is not required on an LRU to identify what software
parts are loaded in that LRU.
Spare copies of the loadable softwa re parts are supp lied on digital storage media
(typically 8.5- in disks) when an airplane is delivered. THese media parts are located
in a binder store d on board the aircraft. In modern aircraft, the maintenance access
term inal (MAT) includes a mass storage device as standard equipment.
This mass storage device also stores spa re copies of the loadable software parts for
syste ms that can be loaded from the MAT.
To operate and maintain an aircraft that contains softwa re loadable syste ms,
operators first must implement seve ral proced ures to accom plish the following:
o Procure loadable software parts and loadable LRUs.
o Manage softwa re libraries.
o Preload loadable software parts into loadable LRUs off the aircraft.
o Verify conformity of loadable software part configurations to aircraft certifi-
cation documentation.

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Software Manageme nt
Notes 5.13 5.13 .2 - HO - 4

Loadable Software Parts and LRUs

A loadable software part is identified by a unique part number, distinct from the part
number of the hardware component (the LRU) or components in which the software
is loaded. Hardware part numbers listed in the illustrated parts cata logue (IPC) refer
to the physical compo nent only, with no software loaded.
To order a loadable LRU with the software preloaded , the operator must order both
the software and hardware part numbers and stip ulate that the softwa re is to be
loaded into the LRU.
The part number of a software program or file is distinct both from the part number
for the media set and the part number for the hardware LRU.
Tlie media set part number may represent one media part or a set of two or more
media parts. The media parts are labelled to indicate how many parts are in the set ,
and to identify the designation of each member in a set (for example, 1 of 2,2 of 2).
The standard media parts are 8.S-in disks, but software for some syste ms is
supplied on other media, such as on CD-ROM. As a result of operato r requests,
beginning in 1999 loadable software will be listed in the IPC accord ing to the
loadable softwa re part number and will be called out in the chapter correspondi ng to
each loadable system.
The disk part number associated with a loadable software part number will be
referenced in the nomenclature field of each software part number.
Loadable software will be shown in the IPC accord ing to the loadable software part
number, because th is is the part number that the mechanic must verify is installed in
an LRU. However, operators must order loadab le software parts by specifyi ng the
disk set part number.

Management of Softwa re Libra ries

It is recommended that operators estab lish and maintain a software control library (or
libraries) for stori ng back- up copies of loadable software, associated documentation ,
and any media binders that are not kept on an airplane.
Using a software contro l library can help operators ensure the availability and
integrity of loadable software parts to support their airplanes. Operato rs must obtain
necessary permission from the supplier before duplicating software, storage media,
or documentatio n.
Each aircraft is provided with media parts which are packaged in a binder or set of
binders. The standard media type is a 8.S-in disk, but the generic term is media set.
Each media set has its own part number, whic h is different from the software part
number or part numbers of its components .
In addition to the media sets delivered with the airplane, a supplier for a loadable
syste m will provide up to ten additional media sets (per part number) upon operator
request.
The binder containing the loadable software is considered part of the certified
configuration of the airplane and so is intended to be stored on the aircraft.
The binders , binder pages , and media sets have unique part numbers and can be
ordered using the same process as for any other spa re.

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Notes 5.13 5.13 .2 - HO - 5

Preloading Loadable Software Parts

Whenever a loadable LRU is replaced, the loadable softwa re configuration certified


for the airplane on which it is installed must be loaded into the replacement LRU.
The operator may request that the supplie r load spec ific software parts when an LRU
is ordered or repaired .
To save time, the appropriate softwa re can also be loaded in the operator's mainten-
ance shop using shop-loading equipment. If an LRU is loaded with software in the
operator 's maintenance shop and returned to stores , it may be desirable to document
the software configuration with a tie- on tag to assist with inventory cont rol.
However, the tie-on tag must be removed after the LRU is installed, and the software
configu ration must be electronically verified as spec ified in the aircraft maintenance
manual removal and insta llatio n procedure for each software-Ioadable LRU.

Conform ity of Loadable Software

The operator must implement proced ures to control updates and modifications to
loadable systems that occur after the airplane is delivered. The part numbers of the
software loaded into a loadable syste m are part of the type certificate of the airplane .
The operator must ensure tliat the config uration control documentatio n for each
airplane reflects the current configuration of loadable software parts, and that the
loadable softwa re parts are certified for the airplane on whic h they are installed.
Loadable software requires the same configuration control as airplane hardware
components. The software part numbers that are part of the delivered configuration
of an airplane are documented in the engineering drawings provided with the
airplane at delivery.
In addition, a report listing the software part numbers delivered with a particular
airplane is provided as an attachment to the airplane readiness log.
Howeve r, this report, as well as the IPC, will not reflect any rapid revisions (RR)
incorporated on a particular airplane that affected loadable software parts. The
operator should review all RRs incorporated on a particular airplane for an accu rate
understanding of the certified configu ration.
The software loaded on a loadable LRU is reported electronically, so a marking on
the LRU is not necessary. To ve rify that the approp riate software parts are installed,
it must be possible to confirm that the appropriate software is loaded while the
componen t is installed in the airplane. Relying on placards or other markings to
determ ine the part number of the software loaded in a componen t is not recom-
mended.
To confirm that the proper part number is loaded in a component, the operator should
verify component status elect ronically by reading the part number from a front panel
display, MAT, control display unit, or other device designed for that purpose.
The operator's configu ration contro l processes shou ld ensure that the configuration
of software part numbers installed on each airplane is documented.
This documentation should be updated when service bulletins or other changes are
incorporated and should be available when needed. Person nel shou ld be trained and
aware of the airline's configuration control processes and the importance of
maintai ning the certified configu ration of loadable software parts.

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Notes 5.14 5.14. 1 - HO - 1

5.14 Electromagnetic Environment

5.14.1 EMC - Elect romagnet ic Compatibility

Nature of Electromagnetic Compatibility

Electro magnetic compatibility (EMC) means that a device is compatible with


(i.e., no interfere nce is caused by) its electromagnetic (EM) environment and it does
not emit levels of EM energy that cause electro magnetic interfere nce (EMI) in other
devices in the vici nity.

A medical devices can be vu lnerable to EMI if the levels of EM energy in its


environment exceed the EM immunity (resistance) to which the device was designed
and tasted , The different forms of EM energy that can cause EMI are conducted,
radiated , and electrostatic discharge (ESD).

EMC is the branch of electrica l sciences which studies the unintentional generation ,
propagation and reception of electro magnetic energy with reference to the unwanted
effects that such an energy may induce.

In particular, the aim of EMC is the correct operation, in the same envi ronment,
of different equipments which involve electromag netic phenomena in their operation.

As most workers in the fie ld understand , electromagnetic compatibility desc ribes a


state when the electromagnetic environ ments produced by natural phenome na and
other electrical and electronic devices do not cause interference in elect ronic
equipment and systems.

Of course to reach th is state, it is necessary to reduce the emissio ns from sources


that are controllab le, to increase the immunity of equipment that may be affected ,
or to do both.

It is important to understand that EMC as defined does not absolutely prevent


interference from occu rring. Rather, it is recognized that emissions from various
sou rces are va riable (e.g. lightning impulses on power lines vary with the level of
lightning current and its distance from a home or office).

In addition, the immunity of a particular piece of equipment can vary (e.g. induced
voltages on a circu it board are strong functions of the angle of incidence and
polarization of the incident EM fie ld).

This variab ility results in a situation where a balance is found betwee n immunity and
emissions for a particu lar ty pe of disturbance to prevent problems in a large
percentage (but not all) of the cases of interest.

To try to eliminate all problems (by decreasing emissions and increasing immunity
further) could create a high cost to industry and could prevent new tec hnologies from
emerging.

For example a restriction to lower the transmitting power of cell phones so that
consu mers could lay their cell phones on top of any piece of electronic equipment
could compro mise the performance and economic viability of cell phone syste ms.

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Notes 5.14 5.14.1 - HO - 2

On the other hand, a requirement that all com mercial electronic equipment perform
without malfunctio n at levels of 50 Vim, would place a financial burden on a large
range of equipment.

A good compro mise is to warn consu mers of reasonable restrictions, although


special actions may be necessary when malfunctions could cause a threat to human
safety.

The frequency range of interest in EMC studies is usually from 100 - 10 11 Hz and the
time scales of interest from 10° - 10- 12 s. Depending on the sou rces and the
syste ms being affected the currents of interest have a range 10- 9 - 106 A and
electric fields have a range 10-7 - 107 Vim.

Electromagnetic Interference (EMI) and Radio Freque ncy Interference (RFI)

Refer to Figure 1.

Electromagnetic interference (EMI) and radio freq uency interference (RFI) are
usually caused by the rapid switching action of semiconductors, relays, etc. resulting
in undesirable currents and vo ltages. These affect the reception of broadcasts and
can lead to the malfunctio ning of other sens itive electrical and electronic equipment.

Electro magnetic interference refers to noise spread over the whole electro magnetic
spectrum. Radio frequency interference refers to noise over the part of the spect rum
used spec ifica lly for broadcasti ng.

Inverte rs etc. cause very severe interfere nce over a wide freque ncy range, due to the
very fast switc hing of components .

Refer to Figure 2.

Electromagnetic interference can be propagated in two ways :


o Conducte d interference along input and output cables
o Radiated throug h direct transm ission, capacitive and inductive coupling etc.

A device is conside red to comply with EMC when:


o Both conducted and radiated interference levels are below spec ified limits.
o It's immunity or susceptibility to conducted and radiated interference are
above specified limits.

EMC generic standards are divided into


o Emission standa rds with
EN 50081- 1 residential and light industry
EN 5008 1-2 heavy industry
o Immunity standa rds with
EN 50082 - 1 residential and light industry
EN 50082- 2 heavy industry.

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Preliminary Module 5 ElM Enviro nment
Notes 5.14 5.14.1 - HO - 3

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Preliminary Module 5 ElM Enviro nment
Notes 5.14 5.14.1 - HO - 4

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Notes 5.14 5.14.2 - HO - 1

5.14.2 EMI - Electromagnetic Interfe rence

5.14.2.1 Nature of Electromagnetic Interference

Refer to Figure 1.

Electromagnetic interference (EMI) is caused by undesirable radiated electromag-


netic fields or conducted voltages and currents. The interfere nce is produced by a
sou rce emitter and is detected by a susceptible victi m via a coupling path.

J he coupling path may involve one or more of the followi ng coupling mechanisms:
o Conduct ion - electric current
o Radiation - electromagnetic field
Capac itive coupling - electric field
o Inductive couplinq - magnetic field.

Conducted noise is coupled betwee n components through intercon necting wires


such as through power supp ly and ground wires. Common impedance coupling is
caused when currents from two or more circuits flow through the same impedance
such as in power supply and ground wires.

Radiated electromagnetic field coupling may be treated as two cases. In the near
field, E and H fie ld coupling are treated separately. In the far field, coupling is treated
as a plane wave coupling.

Electric field coupling is caused by a vo ltage difference between conductors.


The coupling mechanism may be modelled by a capacitor.

Magnetic field coupling is caused by current flow in conductors . The coupling


mechanism may be modeled by a transformer.

Some typical exte rnal noise sou rces into a radio receive r include radiated electric
field coupling from: high- voltage power lines, broadcast antennas , communications
transmitters , vehicle ignition systems and electric mactiinery. Most conducted
coupling from external sources occurs th rough the AC power lines.

Typical radio interference to other equipment includes radiated electric field coupling
to: TV sets, broadcast receivers, telephone lines, appliances , and comm unications
receivers . Most conducted coupling to other equipment occurs th rough the AC power
lines.

The most com mon methods of noise reduction include proper equipment circuit
design , shie lding, grounding, filtering, isolation, sepa ration and orientation , circuit
impedance level control, cable design, and noise cancellat ion techniques.

Electro magnetic radiation involves elect ric (E) and magnetic (H) fields. Any change in
the flux density of a magnetic field will produce an electric field change in time and
space (Faraday 's Law) . This change in an electric field causes another change in the
magnetic field due to the displaceme nt current (Maxwell).

A time- varying magnetic field produces an electric field and a time-varying elect ric
field results in a magnetic field. This forms the basis of electromagnetic waves and
time-varying electro magnetisms (Maxwell's Equations) .

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Wave propagat ion occurs when there are two forms of energy and the presence of a
change in one leads to a change in the other. Energy interchanges between electric
and magnetic fields as the wave progresses.
Electro magnetic waves exist in nature as a result of the radiation from atoms or
molecules when they change from one energy state to another and by natural
fluctuations such as lightning. The technology of generating and processi ng
electromag netic waves forms the basis of telecom munications .

5.14.2.2 Electromagnetic Effects

Electromagnetic effects (EME) includes many electro magnetic environ mental


disciplines such as:
D Electromag netic interference (EMI)
D Electromag netic compat ibility (EMC)
D Electromag netic pulse (EMP).

Electromagnetic Interference

Electromagnetic interference (EMI) is electromagnetic energy that adversely affects


the performance of elect rical/electro nic equipment by creating undesirable responses
or complete operational failure. The interference sources may be external or internal
to the electrica l or electronic equipment and they may propagate by radiation or
conduct ion.
This discipline includes radio frequency interference (RFI), the term which was
originally used to describe most electrical interference.
EMI is usually divided into two general catego ries to help in analyzing conducted and
radiated interference effects:
D Narrowband emission
D Broadband emission.

Narrowband Emission

A narrowband signal occupies a very small portion of the radio spectrum.


The magnitude of narrowband radiated emissions is usually expressed in terms of
volts per meter (V/ m). Such signals are usually continuous sine waves (CW) and may
be continuous or intermittent in occu rrence.
Communication transmitters such as single-channel AM, FM and SSB fall into this
category. Spurious emissions, such as harmonic outputs of narrowband com munica-
tion transmitters , power- line hum, local oscillators, signal generators , test equipment ,
and many other man made sou rces are narrowband emissions.

Broadband Emission

A broadba nd signal may spread its energy across hundreds of megahertz or more .
The magnitude of broadband radiated emissions is usually expressed in terms of
volts per meter per MHz (V/m/MHz) .
This type of signal is composed of narrow pulses having relatively short rise and fall
times. Broadband signals are further divided into random and impulse sources.
These may be transient, contin uous or intermittent in occurrence.

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Examples include unintentional emissions from comm unication and radar trans-
mitters, electric switch contacts , computers, thermostats , motor speed controls,
thyratron circuits, ignition syste ms, vo ltage regulators , pulse gene rators , arc/vapo ur
lamps, and intermittent ground connections .

They may also result from galactic and solar noise, lightning electromag netic pulses ,
and by radio freq uency pulses associated with electros tatic discharges.

Electromagnetic Compat ibility

Electro magnetic compatibi lity (EMC) is the ability of electrical or electronic equip-
menVsystems to function in the intended operating environment without causing or
experienci ng performance degradation due to unintentional EM!.

It is recommended that the performance be tested or qualified to insure operation


within a defined margin of safety for the required design levels of performance.

The EMI sou rce minus the coupling mechanism path losses shou ld result in an
emission level that is less than the victim's susceptibi lity threshold minus a predeter-
mined safety, margin. The goal of EMC is to minimize the influence of electrical noise.

Electronic equipment can malfunction or become totally inoperable if not designed to


properly minimize the effects of interference from the internal and externa l electro-
magnetic environments.

Proper equipment and system designs are also necessary for minimizing potential
electromag netic emissions into the operating environment.

It is important that electro nic equipment designs ensure proper performance in the
expected electromag netic enviro nment, th us maintaining an acceptable degree of
EMC.

Electromagnetic Pulse

The electromagnetic pulse (EMP) or nuclear electro magnetic (NEMP) effect was first
observed during the early testing of high altitude airburst nuclear weapons .

The phenome na has been known since the late 1950s. The characte ristics of the
electromag netic radiation resulting from the nuclear explosio n depend on the altitude
at which the explosion occu rs.

The three EMP categories are


o high altitude burst
o air burst
o surface burst.

Compton Process

Refer to Figure 2.

The source of electromagnetic radiation is basically the same in all cases. The high
energy 'Gamma radiation' from the nuclear explosion collides with the air molecules
in the earth's atmosp here and dislodges electrons from these molecules which then
become free to move rapidly away from their parent molecule.

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These free electrons are known as 'Compton Electrons' and the movement of the
charge is known as 'Compton Current'. Th e differe nce between the three categories
of EMP is the way in which the 'Compton Electrons' and the resulting 'Compton
Current' produce the electromagnetic field (Compton process) .

In an inhomogeneous medium (such as the surface burst case) the recombination


rate of mobile active particles is asym metrica l. This produces a net flow of current
rather like a dipole. In the case of high altitude EMP the elect rons released in the
upper atmosphere by the incident 'Gam ma rays' encounter the earth's magnetic field.

This causes them to spira l round the fie ld, th us producing a huge line of current
loops. This is the domin ant sou rce of electro magnetic radiation in the high altitude
EMP. The field produced is of high magnitude (over 50 kV/ m) and has a very fast rise
time (ns).

Because of the high altitude the area of cove rage is enormo us. It is worth noting that
EMP is the only significant effect of an exo -atmospheric nuclear explos ion. Therefore
it can be of extreme strategic importance. For th is reason electrical and electron ic
syste ms which are required to continue to function throughout a serious conf lict must
be unaffected by EMP.

The frequency spectru m for a nuclear elect romagnet ic pulse contains frequency
components from 1 kHz right up to approxi mately 10 GHz. The protectio n of
electronic equipment from such a large and va ried field presents special problems.

EMP Shielding

Figure 3 shows a genera l layout of EMP shielding for a host building.

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Notes 5.14 5.14.2 - HO - 5

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Preliminary Module 5 ElM Environme nt
Notes 5.14 5.14 .2 - HO - 6

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Preliminary Module 5 ElM Environment
Notes 5.14 5.14.2 - HO - 7

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Notes 5.14 5.14.3 - HO - 1

5.14.3 HIRF - High Intensity Radiated Field

Nature of High Intensity Radiated Field

In modern aircraft, flight controls that once were operated manually via cables and
hydrau lics are increasi ngly being replaced by digital electronics . Because of weight
and maintenance advantages over convent ional hydraulic contro ls, future commer-
cial aircraft are envisioned as 'all-electronic'.

Some aircraft are designed near the edge of aerodynamic stability and even depend
on computer-assisted controls to stay in the air. In this world of digital fly by wire
(or light) avionics, compute rized controls, smart actuators , and other 'black boxes',
the potential susceptibility of flight- critical syste ms to external radio frequency
interference is a real concern.

It would be expensive, dangerous, and nearly impossible to test all of the flight
control syste ms on all classes of aircraft under all likely electromagnetic environ-
ments. Instead , computatio nal and experi mental methods are being developed to
assess the effects of electromagnetic interference on aircraft electronics.

If the elect romagnet ic environment local (inside the aircraft) to a flight- critical
componen t can be calcu lated numerically given the frequency , intensity, and
incidence angle of an illumination , then that component can be tested for upsets
under the same stress in the laboratory.

Field probes located inside the aircraft measure various field intensities. (Figure 1,
detail a)). Then the interactions of the HIRF fields with the aircraft can be visualized
as colour-coded contours, as shown in Figure1, detail b). The warme r colours
indicate higher field intensities, while cooler colou rs represe nt lower field intensities.

HIRF and RF Signals

Introduction

Aircraft transm it and receive RF signals in the atmosphere external to the aircraft.
In addition, RF signals are conducted and radiated within the aircraft, through
electrical cabling , to control and communicate with various electronic syste ms.

High intensity radiated fields produced by powerfu l radar transmitters or lightning,


will partially penetrate a commercial aircraft through apertures in the aircraft's hull.
HIRF may couple onto cabli ng within the aircraft structure and distort or corrupt the
signals carried on these cables , the reby disrupting the normal functions of the
assoc iated aircraft systems .

In addition, if the HIRF gradient within the pressurized area of the aircraft exceeds
23 kV/cm, an elect rical discharge may be induced betwee n narrowly separated
conductors . In this latter case, physical damage to electrica l components may occu r
and flammable materials in the surrounding area may ignite.

The HIRF environment in the vici nity of the occurrence aircraft was studied to
determ ine whether the ambient field strength was sufficient to produce such an
effect.

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Notes 5.14 5.14 .3 - HO - 2

Airport Environment

An assessment of the HIRF environment at an airport was derived from a study of


the peak and average field intensities to whic h aircraft operating in civil airspace
could be exposed. During normal approac h and depart ure operations in the airspace
on and around airports , a peak field strength of 3 kV/ m can occur in the 2 to 6 GHz
frequency band.

Theoretical Worst -Case HIRF Environment

An estimate of the most severe HIRF environ ment, during any phase of flight,
was developed for airspace where fixed- wing commercial operations are permitted.

Field strengths were calculated for surface emitters and airborne intercept radars,
operating at the minimum separation distances permitted under instrument flight
rules.
Mobile and experimenta l transmitters , and transmitters located inside restricted,
prohibited , and danger areas , were not considered. This methodology produced a
worst -case peak field strength of 7.2 kV/m , whic h is assessed to occur in the
4 to 6 GHz frequency band.

Effect of HIRF on VHF Comm unications

Aircraft antennas are designed to receive RF signal energy in specific frequency


ranges and to conduct this RF energy to the radio or radar receive rs in the aircraft.
Aircraft radios are designed for operation at frequencies assigned in accordance with
national and international RF spect rum allocations. These RF spectru m allocat ions
are developed to ensure that authorized high power RF sou rces will not interfere with
aircraft radios and radars.
If a HIRF source were to operate within the assigned frequency range for an aircraft
radio, the HIRF energy within the frequency range to which the radio receiver was
tuned would be demodu lated and amplified, adversely affecting VHF comm unica-
tions.
Howeve r, modern radio receivers are designed to prevent radio signals from being
amplified to unsafe power levels. In genera l, there is no relationsh ip between the
degradation or disruption of VHF comm unications owing to EMI, and the presence of
field strengths sufficient to induce an electrica l discharge between proximate
conductors.

Effect of Resonance on HIRF Energy

When a travelling wave is reflected back upon itself, the incident and reflected wave
energy may combi ne to form a spatially stationary, reinforced wave. For an electro -
magnetic waveform, such as HIRFs, reinforced wave phenomena or resonance can
occur in closed cavities , along a length of wire or around the perimeter of an
aperture.
When resonant conditions exist , the energy density of the reinforced wave may be up
to 25 times greater than the energy density of the incident wave. In practice ,
resonant gain facto rs rarely exceed a single order of magnitude.

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Notes 5.14 5.14.3 - HO - 3

a) Arrangement of field probes

Cockp it field probe First class cabin field probe

Electron ic bay field probe

b) Colour-coded contours

Ex(dB}
O.O()
-5.0()
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-25.00
-30.00
·35.0()
-40 .0()
-45 .00
·50.00
-55.00
-60.00
-65.00
·70.00

Figure 1 HIRF Fields inside an Aircraft

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Notes 5.14 5.14.4 - HO - 1

5.14.4 Lightning/Light ning Protect ion

5.14.4. 1 Introduction

Nature of Lightn ing

Refer to Figure 1.

Lightning is the transi ent passage of electrica l current between a cloud and either the
surface of the earth, another cloud, or an object in or near a cloud (e.g., an aircraft or
rocket) . A lightning flash can contain about one billion vo lts of electricity. That's
enough energy to light a 100 W bulb for three months.

Lightning is most common ly associated with thunderstorms, but can also occur in
snow storms and from the ash cloud of vo lcanic eruptio ns.

Thunderstorms can be an isolated cloud, or part of a line of thunderclouds asso-


ciated with a front on a map of surface air press ure. Lightning is most common in the
spring and summer months, but can occu r at any time.

Damage caused by Lightning

Refer to Figure 2.

Lightning causes damage to buildings and electro nic equipment in three different
ways :
1. Th ere can be damage as a result of a direct lightning strike . Such damage
includes damage to roofing materials, structures such as chimneys , heating
or air conditioning units located on the roof or exter ior of a building, or fires
caused by lightning igniting combustible material, such as wood - frame build-
ings or flammable liquids or vapours .
2. Part of the lightning current can be carried inside a building by electric power,
telep hone, analog or digital data lines (e.g., closed circuit television cameras,
sensors in an industrial plant, etc.). This direct injection of lightning current
inside a building can cause immense damage to electrical - and especially
elect ronic - circuits and equipment.
3. The electro magnetic fields from the current in a lightning stroke can induce
currents and voltage in wire and cables inside a building. Such surge currents
are typ ically less intense than direct injection of current, but can easily vapor-
ize integrated circuits in computers , modems, electro nic control circuits, etc.

Electronic equipment is typically designed to operate in a well-controlled electrica l


environment. It is the responsibi lity of the user to install lightning protection, elect rical
surge-protective devices , and power conditioning equipment to mitigate the effects of
disturbances in the electrical voltage waveform .

It is well recognized that the trend towa rd integrated circuits with more transistors per
unit area, and faster switching speeds , makes these circuits more vulnerab le to both
upset and damage.

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Upset is a temporary malfunction without any physica l change in the devices or


equipment. For example, one might recove r from upset by rebooting a computer;
the only loss would be data that was not written to disk before the upset occu rred,
and consequential damages from the interruption of continuous operations.
The consequential damages can be large, for example , in medical equipment used in
life-support applications.
Damage is a permanent alteration in the physical properties of one or more
componen ts , that requires repair or replacement before the equipment can resume
normal operation.
Examples of lightning damage to elect rical equipment include flas hover of insulation
inside motors or tra nsformers, so that the equipment is no longer functional.
Examples of lightning damage to electronic equipment includes vaporized traces on
printed circuit boards, vaporize d transistors and integrated circuits, blown fuses, etc.
Recovery from damage usually takes much longer than recovery from upset. Prompt
recovery from damage requires advance planning, including local stock of spare
parts or redunda nt systems.
Aside from stock ing parts, one must also plan to have an adequate number of
tec hnicians who can diag nose and repair equipment. The lack of trained repair
person nel is generally a bigger bottle-neck than the lack of replacement parts.
A company also incurs expenses for consequential damages such as overtime pay to
do the backlog of work while the damaged equipment was awaiting repair or
replaceme nt.
Aside from surge currents that are conducted on wires or cables, there can also be
damage from magnetic fields associated with lightning currents. For example,
lightning current that trave ls to earth along reinforcing steel inside a concrete wall or
column can produce a rapidly changing magnetic field that can erase floppy disks or
computer ta pes inside a sto rage cabinet.
Further, this rapidly changing magnetic field can induce a surge current in loops of
wire or cable that are com mon in compute r systems, and such surge currents can
cause damage or upset in the same way as direct injection of lightning current into
wires and cables.
It is well known even to laymen that lightning tends to strike elevated objects , such as
tall trees, ta ll buildings , wate r towers , transmitting antennae for radio or television
stations, overhead power lines, etc. As a result of this knowledge, many people have
the misconception that burying a cable some how protects it from lightning.
The truth is that when lightning current reaches the surface of the earth, the current
does not magically disappear, but prefers to travel through highly conducting metal
pipes (e.g., buried gas and water pipes , etc.) and buried cables (e.g., elect ric power,
telephone lines, cable television, etc.) instead of dry soil or dry rock.
In this way, buried pipes and cables can act like an attractor for lightning current,
in the same way as a tall tower or building.
Lightning current can trave l for long distances on overhead power lines, or in
underground pipes and cables, so that a user who experiences upset or damage
may not recognize that it coincided with a lightning strike some distance from the
user.

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Notes 5.14 5.14.4 - HO - 3

Warning of Lightning

There are many ways that a user can be warned of thunderstorms.

Local weather forecasts, listening for thunder from a line of approaching storms,
looking at the locations of cloud-to-ground lightning on a map provided by national
authorities , or using a local electronic instrument to detect intense atmosp heric
electric fields that signal the develop ment of a thunderstorm overhead.

While such warnings may be useful to mobilize repair personnel, or to shut down
nonesse ntial equipment, it is not economically feasible to discon nect every electrica l
or electro nic appliance during every local thunderstorm .

Therefore, most business must install lightning protect ion and surge -protective
devices, in addition to power conditioning equipment.

Lightn ing Protectio n

Lightning protection and surge -protective devices can be divided into three genera l
classes .

Refer to Figure 3.
1. Th ere are air terminals (common ly called lightning rods) on the roof, whic h
are connected to earth thro ugh down conductors.
Traditionally, a chimney sweep , roofer, or lightning- protection company
installs air term inals.

Refer to Figure 4.
2. Th ere are high- energy surge-protective devices , called arresters, installed
on every electrica l and electronic conductor that enters the building, so that
surge currents are diverted to earth .
Traditionally, a licensed electrician installs a surge arrester at the main
circuit breaker panel.

Refer to Figure 5.
3. There are low- energy surge-protective devices , called suppressors , installed
at each piece of equipment that is either vu lnerable to damage or susceptible
to upset.
Traditionally, the user installs surge supp resso rs at every piece of elec-
tro nic equipment inside a building.

This kind of patchwork installation often provides incomplete protectio n, as there are
interactions betwee n these three classes of protective devices .

For example, in some installations the surge suppressor has a lower voltage
protectio n level than the surge arrester, thereby drawing surge currents inside a
building and creating new problems .

Drawing surge currents inside buildings can create transient magnetic fields inside
the building that can induce surge currents in other loops of wire or cable, and the
surge supp ressor may explode when it absorbs a high- energy surge.

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As another example, lightn ing current can travel from a down conductor, punch
through a wall , and enter the electrical power wiring inside a building. Also, some
installe rs of air termin als, down conductors , and ground rods do an ineffective job ,
which results in a wast e of money for such 'protection'.

Standa rd methods for determi ning lightning protection begin with an estimate of the
number of lightning strikes per square kilometre per year at the user's site.
While this frequency data can be useful in evaluating the economics of lightning
protection, the user must remember that lightning can, and does, cause immense
damage even in regions where lightning is not common.

Therefore, generally the probabi lity of a lightning strike to the user's building can be
ignored, since it is foreseeable that lightning will strike near the building sometime in
the next few years . Instead , it should be focused on the loss that will be caused by
lightning:
o Consequential damages
loss of business income while equipment is inoperative
cost of restoring data from back- Ups and paper records
injuries caused by upset or damage to electro nic equipment, e.g., fai lure
of monitoring equipment in hospital intensive-care ward
o Cost of replacing or repairing damaged equipme nt
o cost of replacing damaged power and data cables
o cost of replacing damaged structure - particularly significant if:
structure contains flammable or explosive materials, so lightn ing could
cause catastrophic loss
building has a wood -frame and is located far from the nearest fire brig-
ade (e.g., a farm house)
building has historic va lue and can not be replaced.
Protection against lightning can be much less expens ive than repair or replacement
of damaged equipment , as well as consequential damages from loss of use of
damaged equipment.

Howeve r, merely connecting some surge suppressors inside the building may result
in an improved ability to withsta nd mild surges, but is generally inadeq uate protect ion
and can create significant new problems.

5.14 .4.2 Applied Surge Protection for Access Cont rol Systems

Refer to Figure 6.

Access control equipment is susceptible to damage from lightning, especially when


installed outdoo rs. Voltage spikes whic h travel through buried data cables, telep hone
lines or AC power lines can damage access control equipment indoors, as well.
While nothing can protect equipment from a direct lightning hit, surge protectors can
help to minimize the damage caused by nearby lightning strikes . Surge protectors
operate by connecting va ristors from data lines to ground.

Surge protectors have no effect on normal circuit vo ltages , but can act quickly to
divert large voltage spikes to ground and away from sensitive components.

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Notes 5.14 5.14.4 - HO - 5

Access contro l units should be equipped with surge protection on all inputs and
outputs. Smart switches, PC's, printers, and modems are designed for an indoor,
office environment and do not have surge protection .

However, by proper ly installing aftermarket surge protectio n devices on all inputs and
outputs , these devices can also be protected from lightning damage .

Su rge Protection Installation

Surge protectio n have to be installed:


o On the AC line voltage input to the PC
o On the AC line voltage input to any transformer or DC power supp ly con-
nected to a reader unit, smart switc h or modem
o On RS-232 data lines connecting a smart switch to reader units , to another
smart switch, or to a PC, printer or modem
o On RS-232 data lines from reader units (RU) to PC's, printers or modems
o On telephone lines connected to modems.

Surge Protectio n Rules

Surge protectors should be installed at both ends of RS- 232 data lines. If this is not
possible , one protecto r should be installed near the smart switch , modem , printer or
PC.

The protecto r must be located at least th ree wire feet away from the device being
protected . The additional wire resistance will dissipate the energy from leading edge
of the spike. The wire can be coiled; a three-foot physical distance is not required .

Surge protectors must be connected to a verified good, nearby earth ground.


This can be AC power ground, a 10" coppe r ground sta ke, or building ground.
Run 16 AWG or heavier wire as short a distance as possible , and avoid any bends in
the wire.

Self grounding surge protectors (without a ground wire or ground screw) will not work
for this application . RS-232 surge protectors shou ld not be used unless they are
equipped with a sepa rate ground wire or ground screw.

Self -grounding surge protectors use the connector shell or pin 1 as a ground path.

The shell and pin 1 are not grounded on smart switches and modems.

AC power surge protectors must be plugged into a properly grounded three- wire
socket.

Cable shields on RS-232 data cables should be connected at one end only.
The cable shield may be te rminated to the same ground as the surge protector.
The cable shield shou ld be unconnected at the opposite end.

At the access control unit, the ground screw on the mounting plate shou ld be
connected to a good earth ground, to allow the built-in surge protection to work
properly.

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Preliminary Module 5 ElM Enviro nment
Notes 5.14 5.14.4 - HO - 6

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Digital Techniques
Preliminary Module 5 ElM Enviro nment
Notes 5.14 5.14.4 - HO - 7

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Digital Techniques
Preliminary Module 5 ElM Enviro nment
Notes 5.14 5.14.4 - HO - 8

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Digital Techniques
Preliminary Module 5 ElM Enviro nment
Notes 5.14 5.14.4 - HO - 9

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Digital Techniques
Preliminary Module 5 ElM Enviro nment
Notes 5.14 5.14.4 - HO - 10

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Page241
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Digita l Techniques
Preliminary Module 5
Elo/Digital AC Systems
Notes 5.15 5.15. 1 - HO - 1

5.15 Typical Electronic/Digital Aircraft Syste ms

5.~5.1 ACARS-ARINC Communications and Addressing and Reporting


System

Introduction

AGARS stands for the aircraft communicatio ns addressi ng and reporting syste m.
AGARS is a digital data link system transmitted via VHF radio which allows airline
flight operations depart ments to communicate with the va rious aircraft in thei r fleet.

This VHF digita l transmission system , used by many civilian aircraft and business
jets, can be likened to 'e- mail for airplanes', as the registration of each aircraft is
it's unique address in the system developed by aeronautical radio giant ARING
(Aeronautica l Radio, Inc.).

Traffic is routed via ARING computers to the proper company , relieving some of the
necessity for routine voice communication with the company. With AGARS, such
routine items as depart ure reports, arriva l reports, passe nger loads, fuel data, engine
performance data , and much more,can be requested by the company and retrieved
from the aircraft at automatic interva ls.

Before the advent of AGARS, flight crews had to use VHF to relay th is data to their
operations on the ground.

AGARS uses the AM mode because the same airborne VHF radio is often also used
for voice com munications . Burst transm issions are used with a limit of 220 characters
per message. Transmissions often last less than one second.

ACARS System

The AGARS system is comprised of the following elements :


o The airborne subsystem, onboard the aircraft , which consists of the
management unit, which receives ground -to-air messages via the
VHF radio tra nsceiver, and also controls the replies
control unit, which is the air crew interface with the AGARS syste m,
consisti ng of a display screen and printer.
o Th e ARING ground system , whic h consists of all the ARING AGARS remote
transmitting/ receiving statio ns, and the AR ING computer and sWitching sys-
tems .
o The air carrier G2 (command and control) and management subsystem,
which performs basically all the ground based airline operations such as
operat ions control, maintenance, crew scheduling and the like, linked up with
the AGARS system .

Messages can be categ orized in two ways :


o Downlinks - whic h are those AGARS transmissions which originate in the
aircraft.
o Uplinks - are those messages sent from the ground statio n to the aircraft.

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Elo/D igital AC Systems
Notes 5.15 5.15.1 - HO - 2

AGARS Transmission

As already mentioned ACARS is an air/ground netwo rk which enables aircraft to


function as mobile computer terminals, with links to control stations. Although most
airliners use this system , only parts of the tra nsmission protoco l are standa rdized or
publicly access ible.

This implementation of an ACARS decoder allows decoding of com mon types of


messages , while leaving unrecogn ized parts in plain text form (as received). A ty pical
series of ACARS transm issions will look something like this example of a Delta
Airlines ACARS message.

Original Message

Refer to Figure 1.
ACARS mode: 2 Aircraft reg: N186DN
Message label: 80 Block id: 0 Message no: M03A

Flight id: DL0107


Message content:-

3C03 0107/24 EDDF/KJFK


/POS OTR/OVR 1015/NXT MASIT/ETA 1118
/ENS N56000W020000/ALT 31O/FOB 0961/SAT 52
/WND 275057/MCH 81/TRB LT CHO P/S KY UNDERCAST/ICE NONE

Encoded Message

Flight from FRANKF URT, GERMANY To JFK , NEW YORK


Weath er over OTR at 1015 GMT Next position MASIT at 111 8 GMT then N56 W20

Altitude 31000 Feet Temperature - 52 Fuel 0961 Speed Mach 0.81

Sky UNDERCAST Turbulence LT CHOP Ice NONE Wind from 275 degrees at
057 Knots

AGARS VHF Freq uencies

The following frequencies (selected examp les) are used to transmit VHF ACARS
data to and from the aircraft:
131.550 MHz Primary channel world -wide
130.425 MHz Additional channel for USA

131.725 MHz Primary channel in Europe


131.525 MHz Seco ndary channel Europe

136.750 MHz New European frequency


131.850 MHz New European frequency

129.125 MHz Additional channel for USA and Canada.

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Preliminary Module 5
Elo/D igital AC Systems
Notes 5 .15 5 .15.1 - HO - 3

AGARS HF Frequencies

The followi ng frequencies (selected examp les) are used to tra nsmit
(upper side -band) HF AGARS data to and from the aircraft :

Auckland 5.583 MHz , 10.084 MHz, 13.352 MHz

New York 5.523 MHz , 8.912 MHz, 11 .315 MHz,


13.275 MHz, 17.919 MHz, 21.934 MHz

Johannesburg 4.681 MHz, 8.834 MHz, 21.949 MHz.

AGARS Ground Station

AGARS ground statio n (selected examples) are:


5J Berlin (131.725 MHz, 131.525 MHz, 136.900 MHz)
o Frankfurt (131.725 MHz, 131.525 MHz, 136.900 MHz)
o Hamburg (131.i725 MHz, 131.525 MHz, 136.900 MHz)
o Munich (131.725 MHz, 131.525 MHz, 136.900 MHz)
o Abu Dhabi (131.725 MHz)
o Dubai (131.725 MHz)
o Gaborone (131.725 MHz)
o Win dhoek (131.725 MHz)
o Acc ra (131.725 MHz)
o Johannesburg (131.725 MHz)
o Kuala Lumpur - Sepang (131.550 MHz).

ACARS Ground Stat ion

The AGARS ground station is the heart of an air-to-ground data commu nicatio ns
syste m. It is much more than a data radio because it manages the interface between
the air-g round data links and the ground based applications . AGARS systems carry
air operational control (AOC) messages between airline host computers and
commerc ial aircraft .

Future systems will suppo rt a wider variety of communications lncludinq GPS and
radar ta rget position reports, air traffic control (ATC) messages, and differe ntial GPS
correct ions.

Refer to Figure 2.

In this Figure a few VHF data communications sites are strategically placed in a
country to provide the coverage and redundancy desired.

Refer to Figure 3.

Each data comm unications site has one or more data link transceivers providi ng the
physica l and channel access protocol layers and the ground station computers
provide the link and netwo rking protoco ls. These sites are linked to a central hub
which provides system services and links to the end users.

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Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15 .1 - HO - 4

This system could easily support any of the data link tec hnologies individually or
simultaneously. This provides a transition capability for ACARS aircraft.

An uninterruptable power supply with back - up generator capable of powering the


site as required to meet site availability goals will also be required.

Technical Data

The following technical data given for an ACARS ground station are to bee seen as
examples.

Transmitter

Power supply 24 VDC, 10 A; 230 VAC 2.1 A

Frequency 118 MHz to 136.975 MHz

RF power output 20 W - 80 W (configurable)

Interface via RS-232

VHF Receiver

Power supply 24 VDC, 10 A; 230 VAC 2.1 A

Frequency 118 MHz to 136.975 MHz

Input range - 107 dBm to +7 dBm

Interface via RS-232

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Preliminary Module 5 Elo/Digital AC Systems
Notes 5.15 5.15 .1 - HO - 7

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Digital Tec hniques
Preliminary Module 5
Elo /D igital AC Systems
Notes 5.15 5.15.2 - HO - 1

5.15.2 Electronic Cent ralised Aircraft Moni tori ng


Refer to Figure 1.
The electronic centra lised aircraft monitoring (ECAM) system was developed for the
AIRBUS A31 0 as an answer to BOEING's EICAS. As far as the process ing and
display of information are conce rned, the ECAM differs significantly from the EICAS,
because the data relate essentially to the primary syste ms of the aircraft only.
Furthermo re, the data are displayed in check-list and pictorial or synoptic format.
Engine operating data are displayed by simulating conventional types of instruments.
Other differences relate to display locations and to the selection of system operati ng
modes.

5.15.2.1 Description of the ECAM

Display Units

The ECAM display units are mounted side -by-side. The left unit displays information
on the status of systems , warnings and corrective actions in a seque nced check-list
format. The right unit displays associated information in pictorial or synoptic format.

Display Modes

There are four display modes. The following three are automatically selected :
o 'Flight phase- related' mode
o 'Advisory (mode and status) ' mode
o 'Failure- related' mode.
The fourth mode is 'manual'. This mode permits the selection of diagra ms related to
any one of 12 of the aircraft 's systems for routine checki ng. Furthermore , it allows for
selection of status messages, provided no warnings have been 'triggered' for display.
The selections are made by means of illuminated push -button switches at the
syste m control panel.
In normal operation the automatic 'flight phase - related' mode is used. In this case
the displays are chosen acco rding to the current ptiase of aircraft operat ion, i.e.
'pre- flight', 'take- off' , 'climb', 'cruise', 'descent' , 'approach' and 'after landing'.
An example of a pre-flight phase is shown in Figure 2; the left display unit displays
an advisory memo mode. The right unit displays a diagra m of the aircraft's fuselage,
doors and arming of the escape slides deployment system.
The 'failure- related' mode takes precedence over the other two automatic modes
and the manual mode. The example in Figure 3 shows that (while tax iing for
take-off) the temperature of the brake unit at the rear right wheel of the left main
landing gear has become excessive.
A diagram of the wheel brake system is immediately displayed on the right display
unit. At the same time, the left unit displays the corrective actions to be taken by the
flight crew. Additionally, an aural warning is sounded and a light
(labelled 'UG WHEE L') at a central warning light display panel is illuminated.
After the correct ive action has been carried out, the instructions on the left display
are replaced by a message in white confirming the result of the action. The diagram
on the right display unit is 'redrawn' accordingly.

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Elo /D igital AC Systems
Notes 5.15 5.15.2 - HO - 2

In the examp le described above , the warning relates to a single system.


By conve ntion, such warnings are indicated by underlining the displayed system title.
In cases where a fai lure can affect other sub-systems, the title of the sub-system is
shown 'boxed', as in the display shown in Figure 4, detail a).
Warnings and the assoc iated lights are cleared by means of 'CLEAR' push-button
switches on either the ECAM control panel or a cent ral warning light display panel.
Status messages, which are also displayed on the left display unit, provide the flight
crew with an operational summary of the aircraft 's condition, possible downgrading of
autoland capability and (as far as possible) indications of the aircraft status follow ing
all failures except those that do not affect the flig ht (detail b)).

Control Panel

The layout of the ECAM control panel is show n in Figure 5. All switches (with the
exception of those for display cont rol) are of the push- button, illuminated caption
type . Th eir functions are:
D SGU selector switches:
The SGU selecto r switches contro l the respective symbol ge nerator !!nits
(SGU). The lights are off in normal operatio n of the system. The 'FAULT'
caption is illuminatea amber if a failure is detected by an SGU's internal
self- test circuit. When a switch is released the correspond ing SGU is
isolate d. This causes the 'FAULT' captio n to extinguis h and the 'OFF'
capt ion to illuminate white.
D Synoptic display switc hes:
Th e synoptic display switches permit individual selection of synoptic
diagrams corresponding to each of 12 systems. They illuminate white when
pressed. A display is automatica lly cancelled whenever a warning or advisory
occu rs.
D CLR switch :
Th e CLR ('clear') switch is illuminated white whenever a warning or status
message is displayed on the left display unit. It is pressed to clear messages .
o STS switch:
The STS ('status ') switch permits manual selection of an aircraft status
message if no warning is displayed. It is illuminated white. Pressing the
switch also causes the CLR switch to illuminate. A status message is
suppressed if a warning occu rs or if the CLR switc h is pressed .
D RCL switch:
Th e RCL ('recall ') switch enables previously cleared warning messages to be
recalled, provided that the fai lure conditions which initiated them still exist.
Pressing the switch also causes the CLR switch light to illuminate. If a failure
does no longer exist, the message 'NO WARNI NG PRESENT' is displayed
on the left display unit.

System Testing

Each flight Y!'.arning .Qomputer (FWC) of the syste m is equipped with a monitori ng
module which automatically checks data acquisition and processi ng modules,
memories and the internal power supplies as soon as the aircraft 's main power
supply is applied to the system.

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Elo /D igital AC Systems
Notes 5.15 5.15.2 - HO - 3

A power -on test routine is also carried out for correct operation of the symbol
generato r units. During this test the display units remain blank. In the event of failure
of the data acquis ition and processi ng modules (or of the warning light display panel)
a 'FAILURE WARNI NG SYSTEM' light at the panel is illuminated.

Failure of a computer causes a corresponding annunciato r light at the maintenance


panel (labelled 'FWC FAULT') to illuminate. A symbol generato r unit fai lure causes a
'F.AULT' capt ion on the approp riate push-button switch at the syste m contro l panel to
illuminate.

Manual self-test checks for inputs and displays are carried out from a maintenance
panel. When the 'INPUTS' switch is pressed , a 'TEST' caption is illuminated white,
and most of the inputs to each computer are checked for continuity. Any incorrect
inputs appear in coded form on the left display unit.

The right display unit presents a list of defective parameters at the system 's data
analogue converte r. The diagra ms of syste ms appea r on the right display unit with
the caption 'TEST' beside the system title , as each correspondi ng push-button
switch is pressed . Calibrated outputs from the data analogue converte r are also
displayed. Any defective parameters are identified by a flag display.

A 'DISPLAYS' push -button switch is provided at the maintenance panel. When


pressed it initiates a check for correct operation of the symbol generator units and
the optica l qualities of the display units by means of a test pattern display.
The 'LOAD' caption is illuminated each time a failure is memorized in the relevant
test circuits of the SGUs.

The annunciator lights at the maintenance panel illuminate white simultaneously with
a failure warning system light at the central warning light display panel when a
correspondi ng com puter fails. The 'INHIB OVRD' switch enables inhibited warnings
to be displayed.

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Digital Techniques
Preliminary Module 5 Elo/D igital AC Systems
Notes 5.15 5.15.2 - HO - 5

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Digital Techniques
Preliminary Module 5 Elo/D igita l AC Syste ms
Notes 5.15 5.15.2 - HO - 6

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Digital Techniques
Preliminary Module 5
Elo/ Digital AC Systems
Notes 5.15 5.15.2 - HO - 7

a) Display of failure

b) Example of status display

~ LAN031NOP
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Figure 4 Display of Failure Affecting a


Subsystem
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Digita l Techniques
Preliminary Module 5 Elo/D igita l AC Syste ms
Notes 5.15 5.15.2 - HO - 8

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Digita l Techniques
Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15.3 - HO - 1

5.15.3 Electronic Flight Instrument Systems

Refer to Figu re 1.
As far as the pure basic functions and the number of display units are concerned ,
an electron ic flight instrument syste m (EFIS) may be conside red as being similar to
some type of flight director system.

However, an EFIS is fully integrated with digital computer -based navigation syste ms.
It utilizes colour-CRT types of ADI and HSI. Therefore it is far more sophist icated
than a flight director.

This is not only in terms of physical construction, but also in the extent to which it
presents attitude and navigational data to the flight crew of an aircraft.

5.15.3.1 System Units

Refer to Figu re 2.

As in the case of conve ntional flight director syste ms, a complete EFIS installation is
made up of left (pilot) and right (co-pilot) systems .

Each syste m in turn is comprised of


D two display units
electro nic attitude deviatio n indicator (EADI)
electro nic horizontal situation indicator (EHSI)
D symbol generator (SG)
D control panel
D remote light sensor unit.
A third (centre) SG is also incorporated in the system so that its drive signals may be
switched to either the left or the right display unit (in the event of failure of the
correspond ing SG).

The signal switching is accomp lished within the left arid right SGs by electro - mech-
anical relays powered from the aircraft's DC power supp ly.

Display Unit

Each display unit consists of the sub - units as shown in Figure 3. The power supply
units provide the required levels of AC and DC power necessary for overall oper-
ation . The supp lies are automatica lly regulated and monitored for undervoltage and
overvo ltage conditions .
The video/monitor card contains a video contro l microprocessor, video amplifiers and
monitoring logic for the display unit.

The main tas ks of the processo r and the associated ROM (read only memory) and
RAM (random access memory) are to calculate gain factors for the three video
amplifiers (red, blue, green) and to perfor m input, sensor and display unit monitor
functions .

The input/output interface functions for the processor are provided by analog
multiplexers , an NO conve rter and a D/A conve rter.

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Elo /D igital AC Systems
Notes 5.15 5.15.3 - HO - 2

The function of the conve rgence card is to take X- and Y- deflection signals .
Furthermo re, the card develops drive signals for the three radial convergence coils
(red, blue and green) and the one lateral conve rgence coil (blue) of the CRT.
There are vo ltage compe nsators monitoring the deflection signals in order to
establish on which part of the CRT screen the beams are located (right or left for the
X-comparator, top or bottom for the Y- comparator) .

Signals for the X- and Y- beam deflections (for stroke and raster sca nning) are
provided by the deflection amplifier card. The amplifiers for both beams each consist
of a two-stage pre-amplifier and a power amplifier.
Both amplifiers use two supp ly inputs:
~ 15 V DC

o 28 V [!)C.
15 V DC is used for effecting most of the stroke scan writing. 28 V DC is used for
re-positioning and raster scan ning.

The interconnect card serves as the interface betwee n the connector of a display unit
and the va rious cards.
Digital line receivers for the signals supp lied by the SGs are also located on th is card.
In a typical system , six colou rs are assigned for the display of the many symbo ls,
failure annunciators , messages and all other information:
o White: display of present situation information
o Green: display of present situation information
where contrast with white symbols is
required, or for data having lower priority
than white symbols
o Mage nta: all 'fly to' informatio n (such as flig ht director
com mands , deviatio n pointers, active flight
path lines)
o Cyan: sky shading on an EADI and for low- priority
information (such as non- active flight plan,
map data etc.)
o Yellow: ground shading on an EADI, caution
information display (such as failure warning
flags, limit and alert annunciators) and fault
messages
o Red: for display of heaviest precipitation levels
as detected by the weather radar (WXR).

Symbol Generators

Refer to Figure 4.

The symbol generators provide the analogue, discrete and digita l signal interfaces
between an aircraft's system , the display units and the control panel.

They perform symbol generation, system monito ring, power control and the main
contro l functions of the EFIS overall.

The interfacing between the card modules of an SG is shown in Figure 4.

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Digital Techniques
Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15 .3 - HO - 3

Symbol Generator Card Functions

Card Function

1/01 and 2 supply of input data for use by the main processo r

Main processor main data -processing and control for the system

Main RAM address decoding , read/write memory and


I/O functions for the system

Main PROM read only memory for the system

Display controller master transfer bus interface

WXR input time sched uling and interleaving for raster, refresh ,
input and standby functions of WXR input data

WXR memory RAM selection for single-input data, row


and column shift, rotate/translate algorithm
and shift registe rs for video output

Display sequencer loads data into registers on stroke and


raste r generator cards

Stroke generator generates all single characte rs, special


symbo ls, straight and curved lines and arcs
on display units

Raster generator generates maste r timing signals for raste r,


stroke , EADI and EHSI functions

Display driver conve rts and multiplexes X- and Y- digital


stroke and raster inputs into analogue for
driver operation; also monitors deflectio n
outputs for proper operation.

Control Panel

Refer to Figure 5.

A control panel is provided for each system . Th e switches are grouped for the
purpose of controlling the displays of their respective EADI and EHSI units as listed
below.

Control Panel Switch Functions


o EADI section :
BRT: cont rols levels of display brightness
DH SET: setting of decisio n height
RST: manually resets decision height circuits after
aircraft has passed th rough decision height

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Digital Tec hniques
Preliminary Module 5
Elo /D igital AC Systems
Notes 5.15 5.15 .3 - HO - 4

o EHSI section:
RANGE : selects range for disp layed WXR and
navigat ion data
MODE SELECT: selects display appropriate to required mode
BRT: outer knob controls main display brightness ;
inner knob controls WXR display
WXR : when pushed in, WXR data are displayed
during all modes except PLAN
MAP switches : used in MAP mode; when pushed in, the
switc hes cause their data to be displayed;
illuminates white.

Remote Light Sensor

This is a photodiode device which responds to ambient light conditions in the cockpit.
It automatically adjusts the brightness of the CRT displays to a compatible level.

5.15.3.2 Display Presentations

Refer to Figure 6 .

The EADI displays pitcti and roll attitude indicatio ns against a raster -scanned
backgrou nd. The upper half is in cyan and the lower half in yellow. Attitude data is
provided by an inert ial reference syste m (IRS).

Also displayed are flight director commands , localizer and glide slope deviation,
selected airspeed , ground speed, AFCS and autothrottle system modes, radio
altitude and decision height.

Figure 6 illustrates a situation during an automatica lly controlled approach to a


landing together with the colou rs of the symbols and alphanumeric data produced via
the EFIS control panel and SGs.

Refer to Figure 7 .

The EHSI presents a selectable, dynam ic colour display of flight progress and plan
view orientation. Four principal display modes may be selected on the control panel:
o MAP
o PLAN
o iLS
o VOR .

Figure 7 illustrates the normally-used MAP mode display. In conjunction with tHe
flight plan data programmed into a flight management computer, th is mode displays
informatio n against a moving- map backgro und with all elements positioned to a
common sca le.

Refer to Figure 8.

In the PLAN mode, a static map backgro und with active route data is displayed.
The display is oriented to true North. Add itionally, track and heading information are
shown.

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Preliminary Module 5
Elo/Digital AC Systems
Notes 5.15 5.15.3 - HO - 5

Failure Annunciat ion

Failure of data signals from such syste ms as the ILS and the radio altimeter are
displayed on each EADI and EHSI in the form of yellow flags 'painted' at spec ific
matrix locations on their CRT scree ns.

In addition, fau lt messages may also be displayed.

EXample: If the associated flight management computer and the weather radar range
disag ree with the control panel range data , the discrepancy message 'WXR/MAP
RANGE DISAGREE' appears on the EHSI.

Source Selector Switch Panel

Refer to Figure 9.

In the type of system described, means are provided by whic h the pilots can
(independe ntly of each other) connect their respective display units to alternate
sou rces of input data , e.g. left or right air data compute rs, flight management
computers, flight contro l computers and sta ndby inertial reference system.

Each pilot has a panel of selector switches. The upper rotary type of switch connects
either the left, centre or right flight control computer to the EADI as the source of
attitude data. The other switches are of the illuminated push type and are guarded to
prevent accide ntal switching . In the normal operating config uration of systems they
remain blank. When activated they are illuminated white.

Display of Air Data

Refer to Figure 3.

In a number of EFIS applications, the display of air data (like altitude , airspeed and
vertical speed) is still provided in the conventional manner, Le. separate indicators
are mounted adjacent to the EFIS display units in the basic 'T' arrangement.

With the continued develop ment of display technology, however, CRTs with much
larger screen areas have been produced.

As may be seen from the BOEING 747-400 flight deck layout in Figure 4,
such displays make it unnecessary to provide conventional primary air data
instruments for each pilot.

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Digita l Techniques
Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15.3 - HO - 6

Figure 1 Electronic Flight Instruments


(Example)
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z"'C
~ I~I
CD ,~
o... CD~
CD =:
..,
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~
g.
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contro l panel .
tn 3 _.
control panel ::::J
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-~ '~" ~ I control ~

Q!. :-I + ~ to<


2. 2:; Left Attitude
::J :::: . Attitude
~. remote I-f-. deviation deviat ion
R<> light sensor indicator .
indicator

g
-

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~
~
~

;:;.
Light
sensor
Ambient
sensor
light
data
.
1 --
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4 situation situat ion j.---
~ indicator indicator
I '
~
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en Digital flight data
rofh acquis ition unit o
c.nc.
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~
a. .. I==i
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Left
symbol - ;
generator
- Center
..symbol
generator
Right
symbol
generator
oi

.. .
t ~

t -t
VOR ....
c e' ;er{iRS TMC
t t ~
t t
TMC
Data busses
DME FCC Left & VOR
DME C t { ILS
RAD.ALT TMC { VOR
DME Center{ IRS
FCC
ILS right ~R en er ~RJcs ILS m
Left ~ALT RighI FMCS { Right ~ALT Left FMCS
Display unit ~ II
FCC FCC
Q..
{ IRS
FCC Right FMCS
IRS
FCC
drive signals
~ o- · 0
FMCS FMCS Switched ~ ~ cO'
CQ.
drive signals 9lro;:::+
...... -0>
c.n» -
",oroJ
o (f) o
I -c zr
en :::J
o CD..o·
Figure 2 EFIS Installation and Signal Interfacing o

-....J
3 c
en m

For Training Purposes Only Page264


@
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:;- I~I 115 V/400 Hz LV powe r
supp ly
HV power
supp ly
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.
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other dispia I unit
- , ~
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~

'<
:>
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~
:::; ..: ...
:;;0 Remote light s snsor I
~. ~
DU brigh :ness

0
R<>
~
-;::
-s
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~
".. --
-- -
::+ i:'S
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~
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g. Green

~' ~
:T
en
rofh
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Beam test Dlqltal llne ( c.nc.
monitor card I
-./'
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?-
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.. ,
c.n -
CD
Intens ity
Raster/stroke -
~ ~
oi
Day/n ight
.. .
.... - ~

X -deflect ion
Analgg.ue, line
. Deflection
receivers amp lifier card
Y - deflection , m
Q..
- ~
1 1 ~
a:"
o- · 0

--
cO'
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:g 9lro;:::+
.
• ..:l
, ~
Convergence lu ...... -
c.n» -
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card ",oroJ
o (f) o
I'<
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zr
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Figure 3 Display Unit, Block Diagram o

CD
3 c
(J) m

For Training Purposes Only Page265


I-I
.
@
=i ~ ... Z
0 "'C
~
~ ~ WXR data " CD ~
~ ~ tn 3
g.
III
~~
<::;.
I ~ Display controller l/O bus •
• -
."
_.
:::l
D)
::::j ~ - ~
~
~,
.~. . . Main PROM ~ .... WXR input
- '
~ '<
-, :::;
::J :::: .

~' I I I I I Transfer bus


R<>
~
<5 ~
::+ ~
~ ;:;. Main RAM ... • • ..: ~ ~isplay unit
0" f-- video
I .... WXR memory Raste r
~ ~2 o
· 16 k RAM generator
z: " Raster
:T ..... :::::"
en

n
~ ~ control :::::..
rofh Mam' f--
........ D"ISP Iay .... · <1l MUX contro l (]l
0 C.
~ processor controller , ~ ...... C
CD Display sequen cer >- (]l
?- .. ' data bUs ,~ Display unit CD
'§.. deflection signals (Jl
FMC _ ~ 0
«l

TMC
RAD ALT
I/O ~ • ~
~
I T Stroke
position
VOR processor 1 .. .. ~ ~ / data
• 0
01 EFIS control b
o W
~ panel ~-

ii1
S'
-
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~
m
:J ~ L,C&R FCCs I/O ' '- Display - - Stro ke lJJ -
e lLS .... .......... ... Q..
~r ~ DME processor 2 • sequencer generator " 0 0
~ 0 • .. . . . . . . Display unit cO" _ 0

~, SG wrap I raster/stroke ;:::;: CO


~, ~ around • 91 OJ ;:::;:
<0
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~ II
I

i~ . Figure 4 Symbol Generator and Signal Interfacing

For Training Purposes Only Page266


Digita l Techniques
Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15 .3 - HO - 10

ADI

DHSET BRT

~o
RST

(0
RANGE HSI BRT

@
160 320

40

20
D10

0::N
B
- - - - - - - MAP - ----=----!:-.,....---
NAV AID ARPT RTE DATA WPT

D88 8rn

Figure 5 Display Control Panel (Example)

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z"'C
~ I~I
::::l
Pitch scales Roll pointer Sky shading
o... CD~
CD =:
~
::::l
~
c)"
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;-
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tn 3 _.
::::l
~ ::::J
~ ~~ D)
-; 1:t ~
iil <,
to<
5' ~
:::;
5' :;;.
~.
R<>
~
--;:: Speed error
o -s indicator
::+
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~
....
3
0-
;I
~

~
:T
en Horizon line - - - ------'
rofh o
C11c.
CD

~
:.. . c
a. C11 -
CD
oi

Q Pitch engaged mode


~. co
2. Roll armed mode
::::l »
s, ~ m
Q..
~- » Localiser Slip Localiser Ground shading Roll engaged mode ~
o
:::l
g
m
::Il
0 deviation indicator deviation
go
(Q - .
C11 CQ.
~: ~ scale (ball in tube) pointer
;::+
:""" Ol Oi
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o<0 Figure 6 EADI Display (Example) ...... 3 CD
...... en en

For Training Purposes Only Page268


@
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:;- I~I o... CD~
CD =:
~
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tn 3 _.
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~ to des ignator symbol VOR/DME NAV source ::::J
~ ~~ D)

~1~.
-; ~
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5' ~
5'
ann unciator
~.
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~I
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::+ ~ 'NORTH- UP' annunciator
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3 identifier
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.c' Displacement
:T
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rofh 10 o
C11c.
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:<CD :.. . c
?- I Designator 'TO' way point C11 -
CD
oi

ETA
WX
range o
~
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m
Distance to Q..
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C11 - .
- .
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Figure 7 EHSI Display in 'MAP' Mode (Example) • CD
......
I\)
3
(J)
C
CD
(J)

For Training Purposes Only Page269


Digital Techniques
Preliminary Module 5
Elo/ Digital AC Systems
Notes 5.15 5.15.3 - HO - 13

Distance Heading orientat ion

Active route

North pointer

Figure 8 EHSI Display in 'Plan' Mode (Example)

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Digital Techniques
Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15 .3 - HO - 14

INSTR SOURCE SEL


FLT DIR
R

L~ @

FMC
~LT~_ C@)
~

EFI

~
IRS

~ C@)
~
AIR
DATA

«
~
L.u

Figure 9 Source Selector Switch Panel


(Example)
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Digita l Techniques
Preliminary Module 5 Elo/D igita l AC Systems
Notes 5.15 5.15.3 - HO - 15

900L Bd

..
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Page272
Digita l Techn iques
Preliminary Module 5 Elo/D igita l AC Syste ms
Notes 5.15 5.15.3 - HO - 16

If L6903:i

-CDc.
E
C'CS
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Page273
Digita l Techniques
Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15.4 - HO - 1

5.15.4 Engine Indicating and Crew Alerting System

An engine indicating and crew alerting system (EICAS) is a system , which was first
introduced in the BOEING 757 and 767 aircraft.

At the time of their introduction, there were differing opinions on how to approac h
such operating factors like flight deck layouts and crews' controlli ng functions , like the
extent to which normal, alerting and warning information should be displayed , and in
particular, whether engine operating data shou ld be displayed for the whole flight or
only during certain phases.

In respect of EICAS, engine operating data are displayed on the CRT units, thereby
eliminating the need for traditional instru ments. These data (as well as those relevant
to other systems) are not necessari ly always on display. But in the event of malfunc-
tions at any time , the flight crew's attention is drawn to them by an automatic display
of messages in the appropriate colou rs.

Layo ut of the EICAS

Refer to Figure 1.

The basic syste m is comprised of


o two display units
o a display select panel
o two computers supplied with analog ue and digital signals from engine and
syste m sensors.

The computers are designated 'left (L)' and 'right (R)'. Only one is in control at a time ;
the other is in 'standby' . In the event of a failure the standby computer may be
switched to 'active' either manually or automatically.

Other components of the syste m are


o discrete cautio n and warning lights
o sta ndby engine indicators
o a remotely-located panel for se lecting maintenance data displays .

The system provides the flight crew with information on primary engine parameters
(full time), with secondary engine parameters and advisory/ca ution/wa rning and alert
messages displayed as required.

Display Units

Refer to Figure 2.

The display units provide a wide va riety of information relevant to engine operatio n
and operation of other automated systems. They utilize colour shadow mask CRTs
and associated card modules.

The units are mounted one above the other. The upper unit displays the primary
engine parameters N1 speed (a certain turbine speed) , ~xhaust gas temperature
(EGT) and warning and cautio n messages. In some cases , this unit can also display
~n g i n e Qressure rat io (EPR) depending on the type of engine(s) installed and on the
methods of processi ng data by the thrust management control syste m.

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Digital Tec hniques
Preliminary Module 5
Elo /D igital AC Systems
Notes 5.15 5.15.4 - HO - 2

The lower unit displays seco ndary engine parameters, i.e. N2 speed , fuel flow,
oil quantity, oil pressu re, oil temperature and engine vibration. In addition, the stat us
of non-engine syste ms, e.g. flig ht control surface positions , hydraulic syste m,
Buxiliary power !!nit (APU), etc., can also be displayed together with the aircraft 's
configu ration and maintenance data.

The row of 'V's shown on the upper display unit only appea rs when secon dary
informat ion is being displayed on the lower unit.

There are seve n colou rs being produced by the CRTs. They are used as follows :
o White :
all scales
normal operating range of pointers
digita l readouts
o Red:
warning messages
maximum operating limit marks on sca les
digita l readouts
o Green :
th rust mode readout
selected EPR/N1 speed marks or target cursors
o Blue:
testing of system only
o Yellow:
cautio n and advisory messages
cautio n limit marks on sca les
digita l readouts
o Magenta:
during in-flight engine starting
for cross -bleed messages
o Cyan:
names of all parameters being measured (e.g. N1/N2, oil pressu re, TAT,
etc.)
stat us marks or cues.

The displays are selected according to the appropriate display selectio n mode.

Display Modes

EICAS is designed to categorize the displays and alerts according to their function
and usage. For this purpose there are three modes of displaying infor mation:
o Operational mode
o Status mode
o Maintenance mode.

The operational and the stat us mode are both selected by the flight crew at the
display select panel, while the maintenance mode is selected at the maintenance
panel by the maintenance personnel only.

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Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15.4 - HO - 3

Operational Mode

This mode displays the engine operating informat ion and any alerts whic h require
action by the crew in flight. Normally, only the upper display unit presents information .
The lower one remains blank and can be selected to display secondary information
as and when required .

Status Mode

When selected , this mode displays data to determ ine the dispatc h readiness of an
airc raft. The display shows the positions of the flight cont rol surfaces in the form of
pointers referenced against vertical scales , selected sub -system parameters and
equipment stat us messages on the lower display unit.

Selection is normally done on the ground either as part of the pre-flight chec ks,
or prior to shut-down of electrica l power to aid the flight crew in making entries in the
aircraft's tec hnical log.

Maintenance Mode

This mode prov ides maintenance engineers with informat ion in five different display
formats to aid them in trouble- shooting and verification testing of the major sub-sys-
tems . The displays , which are presented on the lower display unit, are not available
in flight.

Display Select Panel

The display select panel (Figure 3, detail a)) permits control of EICAS functions and
displays . It can be used both in flight and on the ground. It is normally located at the
centre pedestal of an aircraft's flight deck. Its controls are as follows:
o Engine display switch:
Th is switch is of the momentary- push type fo r presenting (or removing) the
display of secondary information on the lower display unit.
o Status display switch:
Also of the momentary- push type ; this switch is used to display the status
mode information on the lower display unit (detail b)). The display is known
as the 'status page'.
o Event record switch:
This switch is of the momentary- push type as well. It is used in the air or on
the ground to activate the recording of fault data relevant to the enviro n-
mental control system , electrical power, hydraulic system, performance and
APU.
Normally, if any malfunction occurs in a system , it is recorded automatically
(called an 'auto event') and stored in a non-volatile memory of tti e EICAS
computer. The push switch enables the flight crew to record a suspected
malfunction for storage. This is called a 'manual event' .
The relevant data can only be retrieved from the memory and displayed by
operating switches on the maintenance contro l panel when the aircraft is on
the ground.

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Digital Tec hniques
Preliminary Module 5
Elo/Digital AC Systems
Notes 5.15 5.15.4 - HO - 4

o Compute r select switc h:


In the 'AUTO' position , it selects the left (or primary) comp uter and automati-
cally switches to the other computer in the event of a failure. The other
positio ns are for the manual selection of the left or the right computer.
o Display brightness contro l:
The inner knob controls the intensity of the displays. The outer knob controls
the brightness balance between the displays .
[j] Thrust reference set switch:
Pulling and rotating the inner knob positions the refere nce cursor on the
th rust indicator display (either EPR or N1) for the engine(s) selected by the
outer knob.
o Maxim um indicator reset switch:
If anyone of the measured parameters, e.g. oil press ure or EGT,
shou ld exceed normal operating limits, then automatically an alert will appea r
on the display units. The purpose of the reset switch is to remove the alerts
from the display when the excess limits do no longer exist.

Alert Messages

The EICAS contin uously monitors a large number of inputs (typically more than 400)
from engine and airframe syste ms' sensors and will detect any malfunctioning of
these systems.
Refer to Figure 4.
If a fault should occur, then approp riate messages are generated and displayed on
the upper display unit in a sequence corresponding to the level of urgency of the
action to be taken. Up to 11 messages can be displayed at the followi ng levels:
o Level A 'warning':
Warnings require immediate corrective action. They are displayed in red.
Master warning lights are also illuminated, and aural warnings (e.g. fire bell)
are given from a central warning system.
o Level B 'caution':
Cautions require immediate crew awareness and possib le action . They are
displayed in amber and also indicated by message caution lights. An aural
tone is repeated twice.
o Level C 'advisory':
Advisories require the crew's aware ness. They are also displayed in amber.
No caution lights or aural tones are associated with th is level.
The messages appea r on the top line at the left of the display screen. In order to
differentiate between a caution and an advisory message, the latter is always
indented one space to the right.
The master warning and caution lights are located adjacent to the display units
together with a 'cancel' switch and a 'recall' switch. Pushing the 'cancel' switch
removes only the caution and advisory messages from the display. The warning
messages can not be cancelled.
The 'recall' switch is used to bring back the caution and advisory messages into the
display. At the same time , the word 'RECALL' appears at the bottom of the display.

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Notes 5.15 5.15.4 - HO - 5

A message is automatically removed from the display when the assoc iated condition
does no longer exist. In this case, messages which appear below the deleted one
move up one line. When a new fau lt occu rs, its associated message is inserted on
the appropriate line of the display. This may cause older messages to move down
one line.

Example: A new caution message will cause all existing caution and advisory messages to
move down one line.

If there are more messages than can be displayed at the same time, the whole list
forms a so-called 'page'. Th e lowest message is removed and a page number
appears in white on the lower right side of the list. If there is an additional page of
messages it can be displayed by pushing the 'cancel' switch. Warning messages are
carried over from the previo us page.

Display Unit Failure

Refer to Figure 5.

If the lower display unit should fail when secondary information is being displayed on
it, an amber alert message appea rs at the top left of the upper display unit , and the
information is transferred to it.
The format of this display is referred to as 'compact' . It may be removed by pressing
the 'ENGINE' switc h at the display select panel. Failure of a display unit causes the
function of the panel status switch to be inhibited so that the status page format can
not be displayed .

Display Select Panel Failure

If this panel fails , the advisory message 'EICAS CONTRO L PANEL' appears at the
top left of the upper display unit together with the primary information. The secondary
informat ion automatically appears on the lower display unit. The 'cancel/recall'
switches do not operate under this failure condition.

Standby Engine Indicator

The standby engine indicator provides primary engine information in the event of a
tota l loss of the EICAS displays. The displayed informatio n relate to N1 and N
speeds and EGT. The displays of the sta ndby engine indicators are of the LCD type.
Operating limit values are also displayed.

The display control switch has two positions: 'ON' and 'AUTO'. In the 'ON' position ,
the displays are permanently on. In the 'AUTO' position the internal circuits are
functional, but the displays will only be presented when the EICAS displays are lost
due to failures of both display units or both computers.

Maintenance Contro l Panel

This panel is used by the maintenance person nel for displaying maintenance data
which had been stored in the system 's computer memory during flight or ground
operations. The layout of the panel and the principa l functions of each of the contro ls
are shown in Figure 6.

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Notes 5.15 5.15.4 - HO - 6

The five display select switches are of the momentary- push type. When one of them
is activated , the corresponding maintena nce display page appea rs on the lower
display unit screen.

System failures which have occurred in flight and have been automatically recorded
('auto event') in the computer memory (as well as data entered as 'manual even!')
can be retrieved for disp lay by means of the 'event record' switch at the panel.

A self-test of the whole syste m (which can only be activated when an aircraft is on
the ground and its parking brake is set) can be performed by means of the 'TEST'
switch at the maintenance control panel. When the switch is momentarily pressed,
a complete test routine of the syste m is automatically performed.

This test run includes


o all signal- process ing circuits
o all signal process ing circuits
o the power supplies.

An initial test pattern is displayed on both display units with a message in white to
indicate that the system is being tested , i.e. 'L (or R) EICAS' dependi ng on the setti ng
of the selector switch at the display select panel.

During the test , the master caution and warning lights and the aural devices are
activated , and the standby engine indicator is turned on if its display control switch is
at 'AUTO' .

The message 'TEST IN PROG RESS' appears at the top left of the display unit
screens and remains in view while testing is in progress . On satisfactory completion
of the test, the message 'TEST OK' will appear.

If a computer or display unit fai lure has occurred, the message 'TEST FAIL' will
appea r followed by messages indicating which of the units has failed.

A test may be terminated by pressing the 'TEST' switc h a second time or (if it is safe
to do so) by releasing the aircraft 's parking brake. The display units revert to their
normal primary and secon dary information displays.

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Elo/ Digital AC Systems
Notes 5.15 5.15.4 - HO - 7

Upper display unit

Discrete
caut ion &
warning
lights
Aural
warnings
Stand -by
engine
indicators

Maintenance
control panel

Lower display unit

Engine sensor : System sens or: Other system discretes: CD


N1 Oil press Hydr. quant ity & pressu re FCC MCDP
N2
N3
I
Oil qty. DC hyd. syst. temp .
Oil temp . Control surface positions
TMC interface
0)

~
~ Data bus EPA Vibration Elect. syst: volts . amps . freq
EEC interface
FNC interface
~

EGT Gen. dnve temp . RAD alt interface


FF ECS temps. ADC interface
L..- ----'_ _- - J APU EGT RPM

Brake tem .

Figure 1 EICAS (Functional Diagram)

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Elo/ Digita l AC Systems
Notes 5.15 5.15.4 - HO - 8

(f)
"-
a>
......
-0 a>
a> E
;;::::: ro
"-
a> ro
0> 0-
ro
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E c
a>
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a> e-
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« E
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o,

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vvvv <.:' <.:'
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(f)
"-
a>
...... (f)
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c
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.-c ......
0>"-
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cJJ
uis
~...
~

Figure 2 EICAS Display: Engine Parameters


(Example)
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Notes 5.15 5.15.4 - HO - 9

a) EICAS display select panal

DISPLAY COMPU TER BRT THRUST REF SET


• BRT
EVENT AUTO o BAL BOTH MAX IND
• RECORD L R L R RESET

~· IENGIN~I STATUj 0 t!) (0) © 0

b) Status mode disRlay

Figure 3 Display Select Panel and Status Page


(Example)
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Notes 5.15 5.15.4 - HO - 10

L E f\~ GI ~,J E FIR E


Warn ings.. .-: : =======::r:= C,L\RfN /\1 TfTUDF
~ . L ENG OVHT
AUTOPILOT
;. . .- RYAWDAMPER
L UTIL BUS OFF

Figure 4 Display of Alerting Messages

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Notes 5.15 5.15.4 - HO - 11

Figure 5 Failure of Lower Display Unit

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Notes 5.15 5.15.4 - HO - 12

a) Maintenance control panel

Environmental control Electrical and hydraulic Performance and Selects data from
systems and maintenance systems format auxiliary power unit auto or manual eve nt

mos,~ats
in memory

:f: EICAS MAI NT,ocmats

U DISPLAVg ELECT

~ ~LE=c=I : ;': :=1=P=ER=F=I::::;j1l


~ HYD APU

REC ERASE

______
IP r(QY r(QY
~EST~\ ~~-"
BITE test switch Records real-time Erases stored data
for self-test data currently currently displayed
routine displayed (in
manual event)

b) Examples of maintenance mode displays

ECS/MSG ELECIHYD
FLTOK FWD AFT FWD EQUIP FAN 1 STBY APU GND
DUCT TEMP 30 28 17 ZONE TEMP BITE VBAT L R !BAT PWR
TRI M VALVE 0.75 0,80 0.00 NOSE NG DISAGREE LOAD 0.78 0,85 0.00 0.00
LOG GEAR MONITOR
L R PRIM ANTI- SKID AC-V 0 120 125 0 0
PACK OUT 2 3 BRAKE COOLING FREQ 0 402 398 0 0
PRECOOL OUT 193 196 EICAS DISAGREE DC- A 10 140 150 0
DUCT PRESS 40 42 WARN ELEC DC-V 28 28 27 28
PACK FLOW 62 64 FLT REC OFF l OG O UT 145 150
TEMP VALVE 0.75 0.80 CAPT PITOT HEAT l OG RISE 35 47
RAM IN DOOR 0.62 0.7 1 PAGE l
RAM OUT DOOR 0.73 0.72
L C R
HYD QTY 0.82 OiF ULL 0,72 RF
HYD PRESSS 3230 3210 2 140
HYDTEMP 50 47 115
AFT CABIN TEMP ~ L GEN DRIVE ~ R HYD QTY

.. - Auto event
message co
r-,
~
<:>
~

Figure 6 System Maintenance

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Notes 5.15 5.15.5 - HO - 1

5.15.5 FBW - Fly by Wire

Introduction

A flight control syste m consists of the flight contro l surfaces , the respective cockp it
controls, connecting linkage , and necessary operating mechanis ms to control aircraft
in flight.

The fundamentals of aircraft controls have been expla ined in aeronaut ics. Discussion
here cent res on the underlying mechanisms of the flight controls.

Generally the cockpit controls are arranged like this:


o Control yoke for roll whic h moves the ailerons
o Control column for pitch which moves the elevators
o Rudde r pedals for yaw whic h moves the rudder.

Some light aircraft use a contro l stick for both roll and pitch; the rudder pedals for
yaw.

Flight control systems are:


o Mechanical flight control system
o Hydromechanical flight contro l syste m
o Fly by wire (FB'fV) flight control system.

Fly by Wire Principle

Fly by wire (FBW) is the generally accepted term for flight control systems in which a
computer processes the pilot's control movements and sends electric signals to the
flight control surface actuators without any mechanical linkage.

While enhancing aircraft performance and flying qualities , today 's fly by wire systems
present their own unique hazards and risks. Aviation safety officers and accide nt
investigators need to become 'fly by wire literate ' to be effective today.

As aircraft design progressed to high- speed, swept -wing jets , capable of flyi ng over
a broad flight envelope , flight contro l designers faced new problems . Airplane
handling qualities va ried tremendously with speed , fuel burn, or external sto res
configu ration .

Improved stability and handling precisio n were needed, and fly by wire technology
provided the solution. To understand how this technology makes modern airplanes
fly, first at the concept of electronic feedback control is introduced .

Feedback Control System

Refer to Figure 1.

Feedback compe nsation is esse ntially error control. It regulates a syste m by


compar ing output signals to input signals. Any error between the two becomes a
command to the flig ht control surface until output equals input.

A computer measures an aircraft's motion parameter, conditions the signal, amplifies


it, and sums it up with an input command , forming a closed loop.

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Notes 5.15 5.15 .5 - HO - 2

In a FBW schematic block diagram of this process , the upper line is called the
forward path while the lower loop is called the feedback loop or path. Gain is the
amplification (or attenuation) that is applied to the signal to adjust the aircraft
response as desired.
A filter may be used to block feedbac k of signals or motion of an undesired fre -
quency. The diagram's circle, or summer, indicates algebra ic summation accordi ng to
the arrows and signs.
An advantage of a feedback syste m is that the flight control syste m (FCS) can be
used to reduce sensitivity to changes in basic aircraft stability characteristics or
external disturbances. Autopilots , stability augmentation syste ms (SASs) , and control
augmentation systems (CASs) are feedback control syste ms.
In an SAS, the damper function is formed in the feed back loop and usually has low
gain, or authority, over a control surface . CAS , implemented in the forward path,
is high-authority 'power steer ing', providing consistent response over widely vary ing
flight conditions.
CAS and SAS were used extensive ly before fly by wire, as in the A-7 and the F- 15,
but fly by wire provides more precision and much greater flexibility. Uniform aircraft
response is achieve d over a broad flight envelope through CAS gains that are
programmed as functions of airspeed , Mach, centre-of-gravity position, and
configu ration.

Control Laws

Modern flight control com puters are progra mmed with control laws that govern the
feedback contro l syste m. Control laws are commonly named after the primary
feedback parameter as '_ feedback' or '_ command'.
For the pitch channel, common feedbacks are
o ve rtical load factor (Nz or 'g')
o pitch rate (q)
o pitch angle (8 or attit ude)
o angle of attack (a or alpha).
Common lateral fee dbacks are
o bank angle (ljJ)
o roll rate (p).
Typical direct ional feedbacks are
o yaw rate (r)
o side-slip angle (13 or 'beta feedback')
o rate of change of side-slip angle (t) with a dot over it, or 'beta dot feedback') .
Refer to Figure 2.
G comman d, desirable at high speeds , means for a particular amount of stick force ,
the same 'g' regardless of airspeed (energy permitting) is got. In a pitch-rate
comman d system , the same amount of pitch rate for a given stick force regardless of
speed is got.
Pitch- rate feedback and its effects are presented in detai l in Figure 2; - the concepts
apply to any feedback control law.

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Notes 5.15 5.15 .5 - HO - 3

The pilot applies a certai n control force, demandi ng pitch rate, and that becomes the
flight cont rol computer's command for a particular pitch rate. Because the pilot's
control input 'demands' a certain manoeuvre parameter, such an arrangement is
often termed a 'manoeuvre demand ' syste m. The computer, not the pilot, then moves
the control surfaces as required to meet the pilot's demand.

To provide immediate response to pilot input, the computer provides a direct path to
the elevator via the proportional line (called the 'feed forward gain' in the B-777) .
For precision over time, an integrator produces a control surface command until the
feedback signal is equal to the pilot's command signal.

Pure integra l control, or too much integrator gain (K), causes excessive lag in the
aircraft response, hence the use of the proport ional circuit. This arrangement, called
'proportional plus integral' contro l, is found in most fly by wire designs, including the
B- 7.77 and the A320 .

In a block diagram , '1/s' or 'Kjs' denotes an integrator, the 'K' indicating some gain
value. FBW engineers must 'tune' the integrator gain to prevent excessive lag.

Lag causes delay in changing directions- -for examp le, nose- up to nose- down,
whic h is a classic cause of pilot-involved oscillation (PIG). Engineers can mathemat-
ically analyze contro l laws for such instabilities. Thoro ugh flight testing is still
required , however, to validate an FBW system.

So how does an airplane with a pitch-rate command or g command fly? Essent ially,
it gives attitude hold with controls free, similar to an autopilot 's control wheel stee ring
feature.

If pitch attitude is changed and control pressure at the desired attitude is released ,
the system holds that new attitude because the FCS reacts to bring pitch rate to
zero . The airplane shou ld fly nicely with pleasa nt control forces and precise attitude
control.

A side benefit of either pitch- rate or g feedback is autotrim in that speed can
changed without needing to retrim for level flight. And no retrim for thrust or
configu ration changes either has to be done. Autotrim gives apparent neutral- speed
stability.

Even though positive speed stability was a generally accepted design requirement
for more classical airplanes, the lack of it doesn't seem to bother Airbus pilots.
However, Boeing opted to retain conve ntional trim 'feel' in its B-777 design.

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Notes 5.15 5.15.5 - HO - 4

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Digital Techniques
Preliminary Module 5 Elo/D igital AC Systems
Notes 5.15 5.15.5 - HO - 5

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Preliminary Module 5
Elo/Digital AC Systems
Notes 5.15 5.15.6 - HO - 1

5.15.6 Flight Management System

5.15.6.1 Introduction

Refer to Figure 1.

The flight management m'stem (FMS) provides many functions such as


o remote radio tu ning
o estab lishing a flight plan and flight plan storage
o way point select ion and storage
o informatio n on navigation aids and earth reference points , such as airports ,
intersections, runways and routes.

Howeve r, the primary function of the FMS is to provide high accuracy short and long
range, lateral and vert ical navigation. To acco mplish this function , the FMS computer
must calculate and maintain an accurate position. The FMS is capab le of connecting
to a variety of senso rs in order to calculate an accurate position.

These sensors include:


o VO R
o DME
o AHRS
o IRS
o VLF/O mega
o GPS .

Each senso r has individual characteristics which allow them to complement each
other. For examp le, the IRS has very good short -term accuracy in terms of velocity,
but has a long- term drift. This characteristic is complemented by the DME inputs
which are not subject to any drift error.

Refer to Figure 2.

The FMS 'knows ' the characteristics of each sensor and organizes the use of these
senso rs in order to determine the aircraft 's current position. This function is named
'blanking'.

The lateral navigation function of the FMS may be considered as an area navigation
(RNAV) system. Its fundamental purpose is to provide navigation information relative
to selected geograph ic points. Navigation management allows the pilot to define a
route from the present aircraft position to any point in the world.

The FMS provides advisory information and steering commands to allow the pilot
(or the autopilot) to guide the aircraft along the desired route. Routes are defined
from the aircraft 's present positio n to a desti nation way point via a great circle route
(or a series of great circle legs defined by intermediate waypoints).

In its memory the FMS has two data bases:


o A navigation database that contai ns data on navigation aids, airports and air-
ways ; this database is update d every 28 days via the dataloader
o A custom database used by the pilot to create and store flight plans and way-
points; the custom database is not updated on any regular basis.

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Notes 5.15 5.15 .6 - HO - 2

Refer to Figure 1 again.

The FMS is comprised of th ree basic components:


D .control .display u nit (CDU)
D flight manage ment syste m .Qomputer (FMC)
D FMS data loader.

5.15.6.2 Control Display Unit

Refer to Figure 3.

The CDU provides the primary means for the pilot to make inputs into the syste m.
It also provides output display for the flight management computer.

The CDU utilizes a full alphan umeric keyboard , including decimals, dash and slas h.

Line selection keys are provided on each side of the CRT. Function keys are
provided to allow direct access to specific display pages. Annunciators are located at
the top of the unit to advise the pilot of the system status.

To communicate with the flight manage ment and performance computers, the control
display unit (CDU) consists of
D a keyboard
D a CRT display
D the electro nics required to drive the CRT display
D a microprocessor
D power supplies
D progra mmable read only memories (PROM)
D random access memory (RAM)
D input /output buses.

Colour Assignments

The use of colours on the display pages is designed to highlight important infor ma-
tion. Colou r assign ments are coordinated as much as possible with the glectro nic
flight instrument system (EFIS) multifunction .display (MFD).

The colour assign ment is as follow:


D Vertical/at mospheric data cyan
D Lateral data green
D FROM way points yellow
D TO waypoi nts magenta
D Prompts and titles white
D Flight plan names orange
D Index and solutions green.

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Notes 5.15 5.15 .6 - HO - 3

5.15.6.3 FMS Co mputer

Refer to Figure 4.

The flight management system computer (FMC) performs seve n main functions :
0, The input/output functio n:

Receives and transmits digital data to and from the various systems on board the
aircraft and checks that all received data are va lid.
0, The CDU function:

Sends formats , updates and data to the CDU for display and provides alerting
and advisory messages to the CDU for display on the scratch-pad.
0, The bite and monitoring function:

Perfor ms a self-test of the FMC during power up and upon request and
contin uously monitors the FMS during normal operation. Failures are recorded on
non-volatile memory for retrieval at a later date.
0, The navigation function:

Houses the navigation data base and is responsible for computing the aircraft's
current position, ve locity and altitude. It also selects and automatically tunes the
VOR receivers and DME interrogators.

The navigation function computes the aircraft's present position by determi ning
the dista nce to two auto - tuned DME stations . T he intersection of the two
DME radius represe nts the aircraft 's present positio n.

Positional information from the long range sensors used to solve any ambiguity
that may occu r or when the aircraft is on the ground. Velocity and altitude are
computed by using long range sensor inputs and the ADC .
0, The performance function:

Computes performance parameters (limits) and predictio ns for the vertical flight
path of the flight profile, utilizing the performance data base and the CDU input
data.
0, The guidance function:

Stores the active vertical and lateral flight plan input from the CDU. Using the
present aircraft ve locity and position information calculated by the navigation
function, the guidance functio n compares actual and desired position and
generates stee ring commands which are input to the appropriate flight control
computer.

Using the current computed vertical profile data from the performance function,
the guidance function compares actual and desired altitude and altitude rate and
generates pitch and thrust commands which are input to the appropriate flight
Qontrol Qomputer (FCC) and the thrust management Qomputer (TMC).
0, The EFIS function:

Provides dynamic and backg round data to the EFIS symbo l generator and
provides the navigation function with a list of the closest navigation aid array for
auto tuning.

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Digita l Techniques
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Elo/Digital AC Systems
Notes 5.15 5.15.6 - HO - 4

5.15.6.4 FMS Data Loader

The FMS data loader is used to transfer navigation - related data to the FMC.
A typica l data loader uses 8.S-i nch diskettes and is interfaced with the flight
management computer.

The data loader provides the following functions:


o Navigat ion database loading:

The data loader provides tra nsfer of data derived from the Jeppesen database .
Tfiis data includes navigatio nal aids, waypoints , airports , runways , procedures
and jet routes. The data base is updated every 28 days.
o Flight plan loading:

The data loader has also the capability of interfacing with a Lockheed Jet Plan
computer (or equivalent). This gives the pilot the option of loading a flight plan
fro m a diskette.
o Download fault monitor:

It is used to down load the fau lt history from the non-volatile RAM in the syste m.
This information are analyzed and used for troubleshooting.

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Digital Techniques
Preliminary Module 5 Elo/D igital AC Systems
Notes 5.15 5.15.6 - HO - 5

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Page295
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For Training Purposes Only Page296


Digital Techniques
Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15.6 - HO - 7

Line
select
keys

Scratch-
pad

Alpha-
numeric
keys

Mode Function
Keys keys

Figure 3 Control Display Unit

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3(J) (J)

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Digita l Techniques
Preliminary Module 5
Elo/Digital AC Systems
Notes 5.15 5.15.7 - HO - 1

5.15.7 Global Posit ioning System

5.15.7.1 Introduction

The global positioninq system (GPS) is a very modern long- range navigation system .
Its great advantage is that it is very accurate. At the moment, it is the most accurate
long- range navigation system available.

Refer to Figure 1.

The GPS receiver picks up radio signals which are contin uously tra nsmitted
from satell ites. These satellites orbit the earth at an altitude of 20,000 km.

Refer to Figure 2.

Each satellite orbits the earth once every 12 hours. From any positio n on the earth,
a GPS receiver can pick up a signal fro m five different satellites. Even in bad
weather, accurate navigation is available because only th ree sate llite signals are
required for navigation (four sate llites for high accuracy).

The GPS works in a way similar to that of DME. The receiver measures the time a
signal takes to travel from the satellite to the receiver. Th e satellite tells the receiver
its position. The computer inside the GPS receiver calculates the time it took the
signa l to get from the satellite to the receiver.

5.15.7.2 Principles of GPS Ope ration

Refer to Figure 3.

The basic principles behind GPS are quite simple , even though the system itself uses
some of the most 'high- tech' equipment ever developed.

The ideas behind the GPS are:

o Triangulation from satellites is the basis of the syste m.

o To triangu late, GPS measures distance by using the travelling time of a


radio signal.

o To measure the time of travel, GPS needs very accu rate clocks.

o Once the dista nce to a satellite is known , it is necessary to know where the
satellite is in space .

Satellite Ranging

GPS is based on satell ite ranging. This means that the position on the earth is found
by measuring the dista nce from a group of satellites in space. The satellites act as
precise reference points.

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Elo/Digital AC Systems
Notes 5.15 5.15 .7 - HO - 2

Refer to Figure 4.
It is assumed that one's own position is lost. Now the aim is to locate this position.
The distance to satellite A is known , e.g. 11 ,000 km. This means this particular
position must be somewhere on an imaginary sphere that is centered on the satellite
and that has a radius of 11 ,000 km.
Refer to Figu re 5.
It is also known that the distance from this specific position to another satellite (B) is
12,000 km. So, this position is 11 ,000 km away from satellite A and, at the same
time , 12,000 km away from sate llite B. That means, this position is on the circle
where the spheres of the two satellites overlap.
If now a measu rement is made from a third satell ite, the position in question can be
located accurately. It is on the overlap betwee n satellites A and B, and at the same
time 13,000 km away from satellite C. There are only two points in space where this
can be true. Those two points are where the 13,000-km sphere cuts the overlap of
Aand B.
Refer to Figure 6.
By ranging from three satellites it is possible to accurately locate two positions in
space, where the position under consideration can be.
How is it possible to find out which one of those two positions is the true location?
Either a fourt h measurement has to be made from another satellite or otherwise an
assumption can be made.
One of the two points is unlikely to be true. The incorrect point may not be close to
the earth but far away in space. Th e computers in GPS receivers have various
tec hniques for distinguishing the correct point from the incorrect one.
If the altitude of the position in question is known, one of the satellite measurements
can be eliminated easily. One of the satellites ' spheres is replaced by a sphere whic h
is centered in the earth's center and which has a radius equal to the earth 's radius
plus the actual altitude of the particular position. The correct positio n must be
somew here on th is earth-centered sphere.
If it is necessary to be absolutely accu rate, trigonometry says that actually four
satellite ranges are needed to correctly locate the desired position. But in practice,
it is possible to find the correct position with just three ranges, if the unlikely solution
is rejected.
Therefore , the basic principle behind GPS is using satellites as reference points for
triangulating the required position so mewhere on the earth.
Everything else about the system is of a tec hnical nature. These details are designed
to make this ranging process easier and more accurate.

Measuring the Distance from a Sate llite


Since GPS is based on knowing the distances to the satellites in space , a method
for calcu lating these distances is needed .
The basic idea behind measuring the distance to a satellite is a standard equation
'velocity multiplied by travel time'.

Example: If a car trave ls at a speed of 60 km per hour (km/ h) for 2 hours, how far has it
gone? The result is velocity (60 km/ h) multiplied by trave l time (2 h) gives the
distance (120 km).

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Notes 5.15 5.15.7 - HO - 3

The GPS syste m works by timing how long it takes a radio signal from the satellite
to reach the receiver. Then, the distance is derived from that time.

Radio waves trave l at the speed of light: approx . 162,000 nrn/s (approx. 300,000 krn/s ;
exact ly 299,792.458 km/s)) . So, if it is possible to find out when the GPS satellite started
send ing its signal and when it was received, it is known how long it took the signal to
cover the distance. When that time in seconds is multiplied by 300,000 krn/s the range
to the satellite is got in km.
The clocks used for timing need to be good , because light moves very fast and the
travel times are very short . If a satell ite were right overhead it would only take
approx. six hundredths of a seco nd for the signal to reach the receiver.

This timing accu racy is only possible by very precise electronic clocks . In fact,
most receivers can measu re time with nanoseco nd accu racy, i.e. with an accu racy
of 0.000,000,001 second .

Pse udo-Random Codes

Refer to Fig ure 7.

The problem of timing is to find the exact time when the signal has left the satellite .
To overcome this problem , tlie satellites and the receivers are synchronised . This
means, that they generate the same code at exact ly the same time. The codes received
from a satellite are compared to the receiver- generated code. The time of reception is
subtracted from the time when the receiver generated this code . The difference is the
travel time of the signal.
Refer to Figure 8.

Both the sate llites and the receivers generate a set of digital codes . The codes are
identical to each other so that they can be compared easily. They almost look like a
string of random pulses.

The codes are not really random codes . They form 'pseudo- random' sequences
that are actually repeated every milliseco nd, so they are called the 'pseudo- random
code '.

Ti ming

As mentioned earlier, light travels at a speed of 162,000 nrn/s or approx . 300,000 krn/s.
If the sate llite and the receiver were out of synchronisation by even 111 OOth of a seco nd,
the distance measurement could be off by 1,620 nm (approx. 3,000 km). Therefore,
both the receiver and the sate llite have to generate their codes at exactly the same time.
For this reason , the satellites have atomic clocks on board which are very precise.

Note: Atomic clocks obtained their name from the use of the oscillations of a particu lar
atom as their time reference. It is the most stable and most accurate time
refere nce which has ever been developed.

Timing Errors

Note: Normally, when measuring the distance in km or nm to a satellite , this is called


the 'range' to the satellite. But since the range is calc ulated from time, it can be
expressed in terms of time as well.

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Notes 5.15 5.15 .7 - HO - 4

A receiver's clock does not contain an atomic clock but a quartz clock . This clock is not
perfect ly synch ronised with the universal time (Qreenwich mean li me (GMT)). It may be
slower or faster, and when the time is actually 12:00:00 GMT, a quartz clock may still
show 11 :59:59 or even 12:00:01 . This may affect the calculation of positions as follows .
Refer to Figure 9.
It is assumed that the actual positio n is 4 s away from sate llite A (4 . 300,000 km =
1,200,000 km) and 6 s away from satell ite B. If this spec ific position were at sea level
(i.e. when operating in two dimensions) those two ranges would be enough to locate
the position. This position can be called 'X'.
So 'X' is the accurate position when all the clocks are working perfectly.
Refer to Figure 10.
But a receiver, which is 1 s slow, will show the distance to satellite A as being 5 sand
the distance to satellite B as being 7 s. This will cause the two circles to cross at a
different point 'XX'.
This means, that 'XX' is the position a fau lty receiver may show. The result will seem
to be perfectly correct , since it is not known that the receiver is slow. But this result
will be far away from the real position .
To make sure ttiat there is no timing fault, another measurement must be added to
the calculation. This means, that in the two -dimensional examp le a third sate llite is
being ranged.
The offset of 1 s must De added to this measurement as well. The broken lines in
Figure 11 show the 'pseudo- ranges' caused by the slow clock.
Note: The term 'pseudo- range' describes ranges that contain errors (usually timing
errors) .
While the pseudo -ranges of satellites A and B still cross at 'XX', that one of C is not
close to that point. So, there is no positio n that can really be 5 s from A and 7 s from
Band 9 s from C.
The computers in GPS receivers are programed in such a way that, if they get a
series of measu rements which do not intersect at a single point, they will realise
something is wrong. They assu me that the reason is their internal clock. Either it is
off or it has some offset.
Now, the compute r starts subtract ing (or adding) the same amount of time from (to)
all measu rements. This is done until all ranges of one series hit one point.
Using th is example , the computer will detect the error by subt racting one second
from all three measurements. Now, the circles will cross at one point and the
computer assumes that its clock is 1 s slow.
For the solution of this problem , algebraic formulas are used to keep the time
necessary for this procedure as short as possible. Usually, it takes not more than
one or two additional measurements to find out about the clock error of the receiver
and to correct it.
In three dimensions, four measurements are necessary to cance l out any error. Th is
means that a true, accu rate position cannot be obtai ned unless four sate llites are
'in sight', i.e. above the horizo n.
The GPS system consists of 18 active and th ree spare satellites. So there are always
more than four satellites visible from any position on earth.

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Elo/D igital AC Systems
Notes 5.15 5.15 .7 - HO - 5

5.15.7.3 Receiver Design

The need for four measu rements affects the design of GPS receivers . If continuous ,
real -time posit ion measu rements are needed, a rece iver with at least four channels
is req uired in orde r to receive the signals of four sate llites at the same time.

Many applications do not require suc h a high accu racy. Fo r these , a single-channel
rece iver may be enough . A si ngle-channel rece iver receives the signals of fou r
diffe rent satellites in se que nce , i.e . one signa l afte r the other. The whole ope ration
may take between 2 sand 30 s , which is fast enough for many app lications.

But this ty pe of receiver does not provide good velocity calcu latio ns , because any
movement of the receiver during one reception cyc le can affect the acc uracy of the
meas ure me nts.

Therefo re, modern GPS rece ivers have up to 12 channels . With this number of
channels th ey are able to monitor up to 12 sate llites at th e same time . I.e. GPS
can measure th e speed very accurately (with an acc uracy of less than 1 rn/s) .

Anot her disadvantage of the single-channel receiver becomes obvious when


the sate llites transm it the ir 'system condition messages'. Th ese messages take
app rox . 30 s. During that period , navigation must be delayed every ti me a
new satell ite is read .

A popu lar compromise is a two-chan nel receiver. One channel carries out the time
meas ureme nt calculatio ns while the other establishes a radio lock on the next
satell ite to be measured. W hen the first chan nel has finished its measu rement,
it can instan tly sw itch to the new sate llite without was ting any time fo r locking- on it
or for listening to the syste m condition message. Th e other channe l then looks
ahead to the next sate llite and oegi ns the lock- on procedure for that one . When it
is no longer needed for lock-on, it can be used for time measu rement.

This method can greatly speed up th e sequencing, and cont inuous position updates
are always available. A two-channel receiver can be prep rog ramed to track more
than four satellites. When one satellite is blocked (or hidden) , another one can
be instantly ranged without any inte rruption of the nav igation process.

5.15.7.4 Position of Satellites in Space

Satellites are contin uously orbiting th e earth and it is necessary to know the position
of eac h at any given moment.

The sate llites orbit the earth at an altitude of approx . 11 ,000 nm (20,200 km) . Here,
they are well clear of th e earth 's atmos phere . They orbit the eartH on know n paths
like the moo n.

The sate llites are placed in a very precise orbit according to the GPS master plan.
Because there is no atmospheric dra g at altitudes of 20 ,200 km, th e satellites keep
their orbits exac tly.

The orbits are known in advance. Most GPS rece ive rs have these orbits stored in
their memory, whic h tells them where in th e sky each satellite will be at any given
mome nt.

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Digital Techniques
Preliminary Module 5
Elo/Digital AC Systems
Notes 5.15 5.15 .7 - HO - 6

Monitoring Satellites

Refer to Figure 12.

The GPS satellites world-wide are consta ntly monitored by the US Departme nt of
Defence.

Since the satellites orbit the earth once every twe lve hours, they pass over one of the
monitoring stations twice a day. This lets the monitoring stations precisely meas ure
their altitudes , positions , clocks and speeds .

Each satellite transmits this information at two freq uencies (L1 = 1575.42 MHz
and L2 = 1227.6 MHz). The variations from the 'perfect' (i.e. preplanned) orbit are
usually very sma ll.

Once a satellite's position has been measu red and the va riations detected , th is
informatio n is processed by the master control station and transmitted to the satellite
via ground antennas.

Ground antennas are the S-band facilities that provide duplex comm unicatio n with
the satellites by receiving te lemetry and transm itting both comman ds and upload
data. Th e satellite broadcasts the correctio ns along with its timing information.

This message , with the exact orbital location and the syste m status , is called
'system condition message' (or: 'data message').

Most GPS receivers use this information, along with the information in their interna l
memory, to precisely establish the positio n of the satellite .

Figure 13 shows the location of the


o master control station
o monitoring stations
o ground antennas.

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Digital Techniques
Preliminary Module 5
Elo/ Digital AC Systems
Notes 5.15 5.15.7 - HO - 7

Space segment

Time/
position

Control segment
..-
t ; ;.
~/~
User seqrne nt
"'26°YY.03:
03 1°28. 15-
"' 18:01

Figure 1 Global Positioning System

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Preliminary Module 5
Elo/ Digita l AC Systems
Notes 5.15 5.15.7 - HO - 8

Figure 2 GPS Satellite Constellation

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Notes 5.15 5.15.7 - HO - 9

1. Triangulation from satellites 4. Once the distance to a satellite is


is the basis of the GPS. known, the satellite position in
space needs to be known as well.
2. For triangulation, the GPS
5. As the GPS signal travels
measures distances by using
through the atmosphere ,
the travel time of the signal.
it gets delayed.

3. To measure the travel time, the


GPS needs very accurate clocks.

Figure 3 Basic Principles of the GPS

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Notes 5.15 5.15.7 - HO - 10

---------
-- - - ----
~" ~~ )')' - - - - - - - - - - - -

/' . . . --~ . # aV ---- <,

o <,

---- _---+.n..'~ -~
- - - __
--
(
/'
/' ------.~------ • . <,
'-
\

----- ---

Figure 4 Ranging with One Satellite

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Preliminary Module 5
Elo/ Digita l AC Systems
Notes 5.15 5.15.7 - HO - 11

B
------ --------
-------- -- -------- --
-------- ---

/" -- _r-rv~ r
- _ . - - - - - -_ -f1'I..- - - - - - - - / . • .-- - - - -f1'I..- - - - - - -
_ R --y'.,),=" = ;-----

(
/ .... - -- -- ~~-- - - ~ \ ..
-\
..
--- -- ~~-- - ~ --

(
....-
---------- - ----- ---
------ ------

2 measurements provide
this 'circle of position'

Figure 5 Ranging with 2 Satellites

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Preliminary Module 5
Elo/ Digital AC Systems
Notes 5.15 5.15.7 - HO - 12

3 measurements provide
2 possib le 'points of position'

B
- - - ----- --------
---- - - - - - -
--- - - - - -

---- - ---
--- - - - - --
r
\

Figure 6 Ranging with 3 Satellites

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Elo/ Digita l AC Systems
Notes 5.15 5.15.7 - HO - 13

Q)
~

ill
......
ro
(/)
..........
'-
ill
X
......
:~

E
(/)
c
ro
'-
I-

x x

Figure 7 Pseudo-random Code Principle

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Preliminary Module 5
Elo/ Digita l AC Systems
Notes 5.15 5.15.7 - HO - 14

Rece iver

Time diffe rence

Trans mitter (satellite)

Figure 8 Time Difference Between Transmitter


and Receiver
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Notes 5.15 5.15.7 - HO - 15

45 x
65

Figure 9 Position without Timing Faults

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Elo/ Digita l AC Systems
Notes 5.15 5.15.7 - HO - 16

65

Figure 10 Position with Timing Fault


(Two Satellites)
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Preliminary Module 5
Elo/ Digita l AC Systems
Notes 5.15 5.15.7 - HO - 17

A /
/ \
I \
/ \
B
I I
/ ~~
I
I

---
I
55
(wrong time) ,/
./
<, ~11111
<,

,/
/

<,
",
----- c
~ _l_--
~~r--9-;'5~-.L1 ~
(wrong time)

Figure 11 Position with Timing Fault


(Three Satellites)
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Preliminary Module 5 Elo/D igital AC Systems
Notes 5.15 5.15.7 - HO - 18

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Digital Techniques
Preliminary Module 5 Elo/Dig ital AC Systems
Notes 5.15 5.15 .7 - HO - 19

a ~ l g03
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Notes 5.15 5.15.8 - HO - 1

5.15.8 Inertial Refere nce System

5.15.8.1 Introduct ion

Inertial Reference System and Inertial Navigation System

To understand the modern inertial reference system (IRS) it is required to start with
the explanat ion of the INS (inertial navigation syste m) which is the forerunner of the
IRS and is still used in some types of aircraft.

The INS is a long range NAV system that does not rely on the reception of radio
waves . The key to the operation of INS is the very accu rate measurement of the
acceleration forces .

Theory of Operat ion

Refer to Figure 1.

The INS is the only self-contained single source of all navigation data within the
aircraft.
After being supp lied with initial position information , it can continuously update
extremely accu rate displays with:
o position
o ground speed
o attitude
o heading.

It also provides guidance or stee ring information for the autopilot and flight instru-
ments.

Refer to Figure 2.

The basic measuring instrument of the INS is the acce lerometer. There are two
accelero meters fitted in the system . One measures the aircraft 's acce leration in the
north/sou th direction . The other measures the aircraft's acceleration in the east/west
direction.

Basically, the accelero meter is a swinging device. When the aircraft accelerates , the
pendulum (due to inertia) swings off its null position . A signal pick-off device tells
how far the pendulum is off the null position.

The signal from the pick-off device is sent to an amplifier, and current from the
amplifier is sent back into the acce lerometer to the torque motor. The torque motor
restores the pendulum back to its null position.

Triple -Axis Navigation Computation

As long as the aircraft flies in one direction only, one accelero meter is enough to
determ ine the distance travelled from the starting position. Since the aircraft may
move in any direction , three accelero meters are required to sense the acceleration
0
90 apart.

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Elo /D igital AC Systems
Notes 5.15 5.15.8 - HO - 2

Platform Levelling

Refer to Figure 3.

To keep the accelero meter levelled, it is mounted on a gimbal assemb ly, known as 'the
platform'. The platform is a mechan ical device which lets the aircraft go through any
attitude change and at the same time keeps the acce lerometers levelled .

The inner element of the platform (where the accelero meters are fitted) also carries
the gyroscopes and is used to stabilise the platform. The gyros supp ly signals to the
motors which control the gimba ls of the platform.

5.15.8.2 Gyrocom passi ng

The platform is kept horizontal to the earth's surface. Within the inertial reference
syste m there is a navigation com puter which receives an input of latitude and
longitude from the pilot, after the system is turned on. This input tells the navigation
computer its present position. It is the starting point from which the INS can navigate.

Before navigation can start fro m an actual position there must be a reference to true
or magnetic north. This is called 'platform north alignment' or 'gyrocompassing'. The
most common method of platform north alignment is called the 'wander azimuth
system'.

Wander Azimuth System

System Operation

Refer to Figure 4.

The basic fundamentals of a wander azimuth syste m are identical to a basic north
pointing system, except that during gyrocompassing the platform is allowed to take
an angle with respect to true north, that is the initial wander (or: alpha) angle.

The gyro platform is levelled. Firstly it is assu med that the alpha angle is zero , so all
the earth rate compensation is sent to the X-gyro (Figure 4, detail a)).

Because the initial assu mption is not correct, the platform will tilt as the earth rotates
(detail b)).

This tilt condition is detected by the accelero meters. Now the gyro torquing signal will
be split between the two gyros, to compe nsate for the earth's rate of rotation. Instead
of continuing to send all the earth rate compensation to the X-gyro and pointing the
platform to north to satisfy that condition, some earth rate compensation is sent to
the V-gy ro.

When the correct combination of earth rate compe nsation to the gyros is given for
the particular wande r angle, then the platform will remain levelled as the earth rotates
(detail c)). The ratio of earth rate compensation sent to the gyros is then used to
compute the initial wander (or alpha) angle.

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Preliminary Module 5
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Notes 5.15 5.15 .8 - HO - 3

Accelerometer

Refer to Figure 5.

Operation of a wander azimuth syste m is the same as a basic north pointing system ,
except that the wande r angle is take n into acco unt in all computer calculations.

The acce lerometers do not point along north/south and east/west directions but are
offset by the wander angle. However, the computer knows the wander angle and can
easily work out north/sou th and east/wes t accelerations, using the sensed acceler-
ation and the computed wander angle.

5.15.8.3 INS Block Diagram and Main Parts

Figure 6 shows the block diagram of an inertial navigation system. The main
components are:
o mode selector unit
o control display unit
o inertial reference unit.

This syste m is used both in military and civil aircraft . It has the advantage that is can
store way points (WPTS) and a flight plan to let the aircraft fly from the departure point
to its destination by using only INS as the navigation source. The INS can also contro l
the automatic flight control system .

Mode Selector Unit

Refer to Figure 7.

The mode selector unit (MSU) is used to operate the INS.

Control Display Unit

Refer to Figure 8.

The control display unit (CDU) is used by the pilot to input present position and way
points into the navigation computer. On the numerical displays, data are displayed
whic h come from the navigatio n computer.

The display selector switch controls what information is displayed on the numerical
displays .

The data keyboard is used to enter or modify present position or way point informa-
tion.

Inertial Reference Unit

Figure 9 shows an i nertial re ference !!nit (IRU) with its main componen ts:
o sta ble platform (gimbal asse mbly)
o computer
o power supply asse mbly.

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Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15 .8 - HO - 4

5.15.8.4 The Strapdown Inertial Reference System

Theory of Operat ion

The disadvan tage of the gimbal assembly in the INS is that it has many moving parts.
As these parts become older, they create errors in navigation accuracy.

The cost of servici ng and maintenance of the gimbal asse mbly is high and the skill
level required to service the gimbal asse mbly is also high.

To improve reliability and to reduce maintenance costs the 'strapdown IRS' has been
developed. With improve ments in gyro tec hnology and in navigatio n computer
software, the gimbal has been replaced .

The gyros and acce lerometers are 'fixed' or 'strapped' to the airfra me inside the IRS.
They still sense pitch, roll and yaw, and the acce lerometers are still able to sense the
aircraft accelerations.

But the job of the gimbal has been replaced by a computer program.

The IRS performs the same basic navigational functions as an INS but as its fully
digital computer can also be pre-programmed with other relevant reference data
there was the necessity in changing its name.

Inertial Reference Unit

A modern IRS does not use conve ntional spinning gyroscopes and does not need a
gyro stabilized platform.

It contai ns a modern IRU (inertial reference unit) consisting of three acce lerometers
and three ring laser gyros .

The three acce lerometers measure acce leration forces along the aircraft's three
axes:
o ve rtical
o lateral
o longitudinal.

Ring Laser Gyro

Each ring laser gyro is a device with no moving parts that replaces a conventional
gyro with a spinning wheel.

Refer to Figure 10.

The ring laser gyro uses a triangular housing and two different laser beams. A
computer processes the signals from the three accelero meters and the th ree laser
gyro senso rs to determ ine:
o aircraft heading
o position
o groundspeed.

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Preliminary Module 5
Elo/Digital AC Systems
Notes 5.15 5.15.8 - HO - 5

Strapdown System

Refer to Figure 3 again.

This modern IRU is referred to as a strapdow n syste m because it does not need a
gyro stabilized platform like that shown in Figure 3.

The corrections that are needed are calc ulated by the computer.
Like any inertial navigation system the strapdown IRS must be given the geog raphi-
cal coordinates for the present positio n during the alignment before take off.

The IRS can be progra mmed with complete routes of flight and can be coupled to the
aircraft autopi lot to provide steeri ng com mands .

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Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15.8 - HO - 6

a) On track
True north

HOG
OSR
TK

& L: OIS/TIME

~y
wr ~ Wind direction
and speed

b) Off track

Wind direction
and speed

Figure 1 INS/IRS Terminology

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Digita l Techniques
Preliminary Module 5
Elo/ Digita l AC Systems
Notes 5.15 5.15.8 - HO - 7

Torquer

North
acce leration

Signal
pick-off
Force

Null
/
/
/

Figure 2 Principle of a North-Orientated


Accelerometer
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Preliminary Module 5
Elo/ Digita l AC Systems
Notes 5.15 5.15.8 - HO - 8

Gyroscope

Figure 3 Mounting of the Gimbal-Stabilised


Platform in an Aircraft
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Preliminary Module 5
Elo/ Digital AC Syste ms
Notes 5.15 5.15.8 - HO - 9

a) Platform levelled

b) Platform not levelled

c) Platform relevelled

Tilt is detected by accelerometers


causing earth rate compensation
to be split between the 2 gyros

Figure 4 Platform Alignment: Gyrocompassing

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Preliminary Module 5
Elo/ Digita l AC Systems
Notes 5.15 5.15.8 - HO - 10

Figure 5 Accelerometer with Wander Azimuth


System
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Preliminary Module 5
Elo/ Digital AC Systems
Notes 5.15 5.15.8 - HO - 11

MSU

ON/OFF /Mode selection

Pitch/rol l
ToADI
Aircraft power TRUE HOG
To HSI

MAG HOG
INU To HSI
Backup battery NAV HOG
To AFCS

Steering
To HSI
commands

LAT/LONG

Input by pilot
CDU

Legend : INU Inertia l NAV unit


MSU Mode selector unit
CDU Control display unit

Figure 6 Simplified Block Diagram of an INS

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Preliminary Module 5
Elo/ Digita l AC Systems
Notes 5.15 5.15.8 - HO - 12

Ready navigation
light

READ
NAV

BATT

Mode Battery
selector light
switch

Figure 7 Mode Selector Unit (MSU)

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Digital Techniques
Preliminary Module 5
Elo/ Digital AC Systems
Notes 5.15 5.15.8 - HO - 13

Left
numer ical DIM ALERT
display control light

FROMffO ~ ~---;----\----I--­ BATT


light
waYPolnt~~
display I~~~_ - ! - ! - -.... \'---........zfL---~
WPT
selector
sWltch~
--r:
f[iifiil
~ WARN
light
~~

8 EJ GJ G
TKCHG
push-button MAN
AUT~RTM W4 5 6 E Data
~~W.d.-- INSER keyboard
AUTO/MAN/
RTM switch
Ir@
~~ ros
WPT
DIS{TIME ~~~~
1@
~ LJ.....J L.....:....J

7
XTK/TKE A WIN D
INSERT HDG DSR TK
Cl

TEST _D_TK
..I.....-_ _---L............... ~

Display HOLD
selector push-button
switch

Figure 8 Control Display Unit (CDU)

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Preliminary Module 5 Elo/D igital AC Systems
Notes 5.15 5.15.8 - HO - 14

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Preliminary Module 5 Elo/Dig ital AC Systems
Notes 5.15 5.15 .8 - HO - 15

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Digita l Techniques
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Elo/D igital AC Systems
Notes 5.15 5.15.9 - HO - 1

5.15.9 Traffic Alert and Coll ision Avoida nce System

Introduction

Refer to Figure 1.

A traffic glert and ~o llision gvo idance system (TCAS) is used to reduce mid- air
collisions and so-called 'near miss' incidents between aircraft. TCAS helps to
prevent disaste r by present ing a display of surrounding aircraft and, when necessary,
providing audible warnings and manoeuvre instructions to help pilots to avoid danger
with a gentle manoeuvre.

There are two catego ries of TCAS :


o TCAS I and
o TCAS II.

Both systems provide a map-like disp lay of the surrou nding traffic. Both provide a
'traffic gdvisory (TA), whenever other aircraft come close . During a TA, a synthesized
voice announces 'TRAFFIC TRA FFIC', and the sy mbol for the othe r aircraft changes
shape and colour.

TCAS II, the more sophisticated TCAS , has an additio nal functio n called a 'resolution
gdvisory (RA)'. During an RA, the TCAS will command a manoeuvre such as 'CLIMB
CLIMB', or 'DESCEND DESCEND', or may tell the pilot not to manoeuvre.

Note: The European organization for the safety of air navigation (EUROCONTRO L),
which reco mmends aviation regulations for Europea n nations, has suggested
requiring a system identica l to the latest TCAS II syste m. In Europe , the syste m
will be called the .f!.irborne ~o llision .f!.voidance system (ACAS II).

Function

TCAS consists of a radio transm itter and a receiver (transponder) , directional


antennae, a computer and a cockpit display. A TCAS sends out radio signals (called
interrogations), similar to those from the SSR part of an gir traffic ~ont rol (ATC) radar
on the ground.

W hen another airplane 's transponder receives an interrogation, it tra nsmits a reply.
The TCAS computer uses the time between the interrogation and the reply to
calcu late the distance. It uses information from the directional antennae to dete rmine
the direction.

If the other aircraft has a tra nsponder that provides altitude data , the TCAS displays
the relative altitude of the othe r aircraft and shows whether it is climbing or descend-
ing.

Refer to Figure 2.

Example: If an aircraft is 200 feet above and another is 1,400 feet below own aircraft, '+02'
appea rs at the higher aircraft 's sy mbol and '- 14' at the lower aircraft 's one. If the
aircraft is climbing at a rate of more than 500 feet per minute, an arrow pointing
upwa rds appea rs beside its sy mbol. If desce nding, the arrow points dow nwards.

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Elo/D igital AC Systems
Notes 5.15 5.15 .9 - HO - 2

& A TCAS is not a radar and can not detect an aircraft without a compatible transpon -
der. Some transpon ders are incompatible with TCAS and will not be detected .

Regulations limit the TCAS power to reduce radio interierence. This effective ly limits
the TCAS range to approx imately 45 nm forward and significantly less to the sides
and the rear. In some systems , the flight crew may select shorter display ranges to
provide greate r detail and less clutter while in heavy traffic.

Although TCAS can track up to 45 aircraft, it can display a maximum of 30, selecting
the Highest-priority targets for display.

A traffic advisory is issued when anothe r aircraft is within approximately 48 s of its


closest point of approach , (the point where both aircraft will be closest together) ,
based on projections derived from the current flight path and speed . When a TA is
issued, the Cliamond- shaped aircraft 's symbol changes to a yellow round dot and a
voice annou nces 'TRAFFIC TRA FFIC'.

If both aircraft continue on a conflicting course after the TA, the syste m announces a
resolution advisory (only TCAS II) approxi mately 35 s before the closest point of
approach is reached. During an RA, the other aircraft's symbo l changes to a solid red
squa re block and the voice announces a manoeuvre , e.g. 'CLIMB CLIMB '.

The system also displays a green band on the vertical speed indicator to show the
desired rate for the manoeuvre. These suggested manoeuvres are gentle and
normally not noticed by passenge rs.

Note: TCAS regulations allow commands for vertical manoeuvres only, not for turning
manoe uvres.

When a TCAS II issues an RA involving another TCAS II-equipped aircraft,


it coordinates with the other aircraft's TCAS II to avoid mirror-i mage manoeuvres ,
such as having both airplanes climb.

Refer to Figure 1 again .

The TCAS system includes a TCAS processor, one or two directional antenna(e) ,
a tra nsponder and a cockpit display (separate indicato r or integrated in the electro nic
display system). Following information are provided by the transponde r:
o Mode A transpon der:

sends identification code without altitude


o Mode C transpon der:

sends identification code and encoded altitude


o Mode S transponder (TCAS II only) :

sends identification code , encoded altitude and other datafields including


aircraft discrete address.

Figure 3 shows a rad io management yn it (RMU) which includes the control panel for
transpon derffCAS operation.

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Preliminary Module 5 Elo/D igita l AC Syste ms
Notes 5.15 5.15.9 - HO - 3

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Page335
Digital Techniques
Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15.9 - HO - 4

Symbol Legend

Distance more than 6 nm

Distance less than 6 nm

Closest point of approach within 20 s to 48 s


Closest point of approach within 15 s to 35 s

Own aircraft

Climb rate more than 500 feet


Sink rate more than 500 feet

Altitude 1,400 feet below own aircraft


Altitude 200 feet above own aircraft

Figure 2 TeAS Display


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Digita l Techniques
Preliminary Module 5
Elo/D igital AC Systems
Notes 5.15 5.15.9 - HO - 5

G
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Figure 3 RMU with TCAS Control

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